74F595 Datasheet, PDF (3/13 Pages) NXP Semiconductors – 8-bit shift register with output laches 3-State

Philips Semiconductors
8-bit shift register with output latches (3-State)
Product specification
74F595
LOGIC SYMBOL
14
Ds
13
OE
12
STCP
11
SHCP
Qs
9
10
SHR
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
V_CC = Pin 16
GND = Pin 8
15 1 2 3 4 5 6 7
SF01097
IEC/IEEE SYMBOL (IEEE/IEC)
13
EN3
12
C2
SRG8
10
R
11
C1/ !
14
1D
2D 3
15
1
2
3
4
5
6
2D 3
7
9
SF01098
MODE SELECT – FUNCTION TABLE
INPUTS
INTERNAL SHIFT INTERNAL STORAGE
REGISTERS
REGISTER
OUTPUTS
OE SHR SHCP STCP Dn
O0
O1–O7
Q0–Q7
Q0–Q7
QS
OPERATING
MODES
H
H
↑
↑
X
O0
O1–O7
Q0–Q7
Z
Q7
No Change
H
L
X
↑
X
L0
L
L
L
X
↑
X
L0
L
Q0–Q7
Q0–Q7
Z
Q0–Q7
L
Clear shift
L
register, hold latch
H
H
↑
↑
ds
Ds
o0–o6
L
H
↑
↑
ds
Ds
o0–o6
Q0–Q7
Q0–Q7
Z
o6
Q0–Q7
o6
Shift
H
H
↑
↑
X
O0
O1–O7
L
H
↑
↑
X
O0
O1–O7
o0–o7
o0–o7
Z
Q7
o0–o7
Q7
Store
H
H
↑
↑
ds
Ds
o0–o6
L
H
↑
↑
ds
Ds
o0–o6
o0–o7*
o0–o7*
Z
o0–o*
o6
Store, then Shift
o6
H = High voltage level
L = Low voltage level
X = Don’t care
Z = High impedance
dn (on)=Lower case letters indicate the state of the referenced input (or output) one setup time prior to the Low-to-High clock transition
↑ = Low-to-High clock transition
↑ = Not a Low-to-High clock transition
* = When clocking both SHCP and STCP simultaneously the Shift Register state will always be one clock pulse ahead of the Storage
Register
1990 Apr 18
3