P8XCX70 Datasheet, PDF (57/80 Pages) NXP Semiconductors – Fully static 80C51 CPU

Philips Semiconductors
Microcontrollers for NTSC TVs with On-Screen
Display (OSD) and Closed Caption (CC)
Product specification
P8xCx70 family
Table 93 Status Register (address 87F8H); write only
7
6
5
4
3
2
1
0
−
H/V
SCON
SCRL
−
−
−
−
Table 94 Description of SR bits
BIT
SYMBOL
DESCRIPTION
7
−
This bit is not used and causes no action.
6
H/V
Busy signal switch horizontal/vertical. If H/V = 0, horizontal blank area selected.
If H/V = 1, vertical blank area selected.
5
SCON Scroll area enabled. If SCON = 1, then the scroll area is enabled.
See Section 18.5.1.2.
4
SCRL Start scroll. If SCRL = 1, this bit indicates that the scroll function is in progress. When
this bit is set, the automatic scroll function is started. It is automatically cleared on
completion. If forced to a logic 0, the scroll function will be terminated as if all lines were
scrolled. Subsequent logic 0 writes will cause the scroll row to increment by one.
3
−
These 4 bits are not used and cause no action.
2
−
1
−
0
−
18.9.10 HSYNC DELAY REGISTER (HSDR)
Table 95 HSYNC Delay Register (address 87FCH)
7
6
5
4
−
HSD6
HSD5
HSD4
3
HSD3
2
HSD2
1
HSD1
0
HSD0
Table 96 Description of HSDR bits
BIT
SYMBOL
DESCRIPTION
7
−
reserved
6
HSD6 HSYNC delay. These 7 bits allow the position of the HSYNC pulse to be changed in
5
HSD5 ^{increments of full width characters. A delay of 0 to 63 full width characters can be}
4
HSD4
selected.
3
HSD3
2
HSD2
1
HSD1
0
HSD0
1999 Jun 11
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