P8XCX70 Datasheet, PDF (17/80 Pages) NXP Semiconductors – Fully static 80C51 CPU

Philips Semiconductors
Microcontrollers for NTSC TVs with On-Screen
Display (OSD) and Closed Caption (CC)
Product specification
P8xCx70 family
Table 12 Selection of SCL frequency in Master mode
CR2
0
0
0
0
1
1
1
1
CR1
0
0
1
1
0
0
1
1
CR0
0
1
0
1
0
1
0
1
f_osc DIVISOR
60
1600
40
30
240
3200
160
120
BIT RATE (kHz) at f_osc = 12 MHz
200
7.5
300
400
50
3.75
75
100
10.4 Status Register (S1STA)
S1STA is an 8-bit read-only Special Function Register. The contents of S1STA may be used as a vector to a service
routine. This optimizes response time of the software and consequently that of the I²C-bus. The status codes for all
possible modes of the I²C-bus interface are given in Table 16. The abbreviations used in Table 16 are defined in
Table 15.
Table 13 Status Register (SFR address D9H)
7
6
5
4
3
2
1
0
SC4
SC3
SC2
SC1
SC0
0
0
0
Table 14 Description of S1STA bits
BIT
7 to 3
2 to 0
SYMBOL
SC4 to SC0
−
DESCRIPTION
5-bit status code; see Table 16.
These 3 bits are held LOW.
Table 15 Abbreviations used in Table 16
SYMBOL
SLA
R
W
ACK
ACK
DATA
MST
SLV
TRX
REC
DESCRIPTION
7-bit slave address
read bit
write bit
acknowledgment (Acknowledge bit = 0)
not acknowledge (Acknowledge bit = 1)
8-bit byte to or from the I²C-bus
master
slave
transmitter
receiver
1999 Jun 11
17