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PSMN2R9-30MLC_15 Datasheet, PDF (5/14 Pages) NXP Semiconductors – N-channel 30 V 2.95 mΩ logic level MOSFET in LFPAK33 using NextPower Technology
NXP Semiconductors
PSMN2R9-30MLC
N-channel 30 V 2.95 mΩ logic level MOSFET in LFPAK33 using NextPower Technology
6. Characteristics
Table 6. Characteristics
Symbol
Parameter
Static characteristics
V(BR)DSS
drain-source
breakdown voltage
VGS(th)
∆VGS(th)/∆T
IDSS
gate-source threshold
voltage
gate-source threshold
voltage variation with
temperature
drain leakage current
IGSS
gate leakage current
RDSon
drain-source on-state
resistance
RG
gate resistance
Dynamic characteristics
QG(tot)
total gate charge
QGS
QGS(th)
QGS(th-pl)
QGD
VGS(pl)
Ciss
Coss
Crss
gate-source charge
pre-threshold
gate-source charge
post-threshold
gate-source charge
gate-drain charge
gate-source plateau
voltage
input capacitance
output capacitance
reverse transfer
capacitance
Conditions
ID = 250 µA; VGS = 0 V; Tj = 25 °C
ID = 250 µA; VGS = 0 V; Tj = -55 °C
ID = 1 mA; VDS = VGS; Tj = 25 °C
VDS = 30 V; VGS = 0 V; Tj = 25 °C
VDS = 30 V; VGS = 0 V; Tj = 150 °C
VGS = 16 V; VDS = 0 V; Tj = 25 °C
VGS = -16 V; VDS = 0 V; Tj = 25 °C
VGS = 4.5 V; ID = 25 A; Tj = 25 °C;
see Figure 10
VGS = 4.5 V; ID = 25 A; see Figure 11;
see Figure 10
VGS = 10 V; ID = 25 A; Tj = 25 °C;
see Figure 10
VGS = 10 V; ID = 25 A; Tj = 150 °C;
see Figure 10; see Figure 11
f = 1 MHz
ID = 25 A; VDS = 15 V; VGS = 10 V;
see Figure 12; see Figure 13
ID = 25 A; VDS = 15 V; VGS = 4.5 V;
see Figure 12; see Figure 13
ID = 0 A; VDS = 0 V; VGS = 10 V
ID = 25 A; VDS = 15 V; VGS = 4.5 V;
see Figure 12; see Figure 13
ID = 25 A; VDS = 15 V; see Figure 12;
see Figure 13
VDS = 15 V; VGS = 0 V; f = 1 MHz;
Tj = 25 °C; see Figure 14
Min Typ Max Unit
30 -
-
V
27 -
-
V
1.45 1.78 2.15 V
-
-4.3 -
mV/K
-
-
1
µA
-
-
100 µA
-
-
100 nA
-
-
100 nA
-
3.3 3.8 mΩ
-
-
6.5 mΩ
-
2.45 2.95 mΩ
-
-
5.05 mΩ
1.23 2.46 4.92 Ω
-
36.1 -
nC
-
16.7 -
nC
-
34.8 -
nC
-
6.1 -
nC
-
3.9 -
nC
-
2.2 -
nC
-
4.4 -
nC
-
2.7 -
V
-
2419 -
pF
-
500 -
pF
-
180 -
pF
PSMN2R9-30MLC
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 15 June 2012
© NXP B.V. 2012. All rights reserved.
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