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GTL2002 Datasheet, PDF (5/14 Pages) NXP Semiconductors – 2-bit bi-directional low voltage translator
Philips Semiconductors
2-bit bi-directional low voltage translator
Product data sheet
GTL2002
Uni-directional down translation
For uni-directional clamping, higher voltage to lower voltage, the GREF input must be connected to DREF and both pins pulled to the higher side
VCC through a pull-up resistor (typically 200 kΩ). A filter capacitor on DREF is recommended. Pull-up resistors are required if the chipset I/O are
open drain. The opposite side of the reference transistor (SREF) is connected to the processor core supply voltage. When DREF is connected
through a 200 kΩ resistor to a 3.3 V to 5.5 V VCC supply and SREF is set between 1.0 V to VCC – 1.5 V, the output of each Sn has a maximum
output voltage equal to SREF.
TYPICAL UNI-DIRECTIONAL – HIGH TO LOW VOLTAGE TRANSLATION
1.8 V
1.5 V
1.2 V
1.0 V
EASY MIGRATION TO
LOWER VOLTAGE AS PRO-
CESSOR GEOMETRY
SHRINKS.
VCORE
CPU I/O
GTL2002
GND
SREF
GREF
DREF
S1
D1
S2
D2
5V
200 kΩ
VCC
CHIPSET I/O
TOTEM POLE I/O
SA00643
Figure 5. Uni-directional down translation, to protect low voltage processor pins
Uni-directional up translation
For uni-directional up translation, lower voltage to higher voltage, the reference transistor is connected the same as for a down translation.
A pull-up resistor is required on the higher voltage side (Dn or Sn) to get the full HIGH level, since the GTL–TVC device will only pass the
reference source (SREF) voltage as a HIGH when doing an up translation. The driver on the lower voltage side only needs pull-up resistors if it is
open drain.
TYPICAL UNI-DIRECTIONAL – LOW TO HIGH VOLTAGE TRANSLATION
1.8 V
1.5 V
1.2 V
1.0 V
EASY MIGRATION TO
LOWER VOLTAGE AS PRO-
CESSOR GEOMETRY
SHRINKS.
VCORE
CPU I/O
GTL2002
GND
SREF
GREF
DREF
S1
D1
S2
D2
200 kΩ
5V
VCC
CHIPSET I/O
TOTEM POLE I/O
OR OPEN DRAIN
Figure 6. Uni-directional up translation, to higher voltage chip sets
SA00644
2004 Sep 29
5