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74F573 Datasheet, PDF (5/14 Pages) NXP Semiconductors – Octal transparent latch 3-State
Philips Semiconductors
Latch/flip-flop
Product specification
74F573/74F574
FUNCTION TABLE – 74F574
INPUTS
OE
CP
Dn
INTERNAL
REGISTER
OUTPUTS
Q0 – Q7
L
↑
l
L
L
L
↑
h
H
H
L
↑
X
NC
NC
H
↑
Dn
Dn
Z
H = High voltage level
h = High voltage level one setup time prior to the Low-to-High clock transition
L = Low voltage level
l = Low voltage level one setup time prior to the Low-to-High clock transition
NC= No change
X = Don’t care
Z = High impedance “off” state
↑ = Low-to-High clock transition
↑ = Not a Low-to-High clock transition
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limits set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free-air temperature range.)
SYMBOL
PARAMETER
VCC
VIN
IIN
VOUT
IOUT
Tamb
Tstg
Supply voltage
Input voltage
Input current
Voltage applied to output in High output state
Current applied to output in Low output state
Operating free-air temperature range
Storage temperature
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
VCC
VIH
VIL
IIK
IOH
IOL
Tamb
Supply voltage
High-level input voltage
Low-level input voltage
Input clamp current
High-level output current
Low-level output current
Operating free-air temperature range
OPERATING MODES
Load and read register
Hold
Disable outputs
RATING
–0.5 to +7.0
–0.5 to +7.0
–30 to +5.0
–0.5 to +VCC
48
0 to +70
–65 to +150
UNIT
V
V
mA
V
mA
°C
°C
LIMITS
MIN NOM MAX
4.5
5.0
5.5
2.0
0.8
–18
–3
24
0
70
UNIT
V
V
V
mA
mA
mA
°C
1989 Oct 16
5