ISP1561 Datasheet, PDF (48/102 Pages) NXP Semiconductors – ISP1561BM

Philips Semiconductors
ISP1561
USB PCI host controller
Bit
15
14
13
12
11
10
9
8
Symbol
PCED[11:4]
Reset
0
0
0
0
0
0
0
0
Access
R
R
R
R
R
R
R
R
Bit
7
6
5
4
3
2
1
0
Symbol
PCED[3:0]
reserved
Reset
0
0
0
0
0
0
0
0
Access
R
R
R
R
-
-
-
-
Table 57: HcPeriodCurrentED register: bit description
Bit
Symbol Description
31 to 4
PCED[27:0] PeriodCurrentED: This is used by the Host Controller to point to
the head of one of the Periodic lists that needs to be processed in
the current Frame. The content of this register is updated by the
Host Controller after a periodic ED has been processed. The HCD
may read the content in determining which ED is currently being
processed at the time of reading.
3 to 0
-
reserved
11.1.9 HcControlHeadED register (address: value read from func0 or func1 of address
10H + 20H)
The HcControlHeadED register contains the physical address of the first ED of the
Control list. The bit allocation is given in Table 58.
Table 58: HcControlHeadED register: bit allocation
Bit
31
30
29
28
27
26
25
24
Symbol
CHED[27:20]
Reset
0
0
0
0
0
0
0
0
Access
R
R
R
R
R
R
R
R
Bit
23
22
21
20
19
18
17
16
Symbol
CHED[19:12]
Reset
0
0
0
0
0
0
0
0
Access
R
R
R
R
R
R
R
R
Bit
15
14
13
12
11
10
9
8
Symbol
CHED[11:4]
Reset
0
0
0
0
0
0
0
0
Access
R
R
R
R
R
R
R
R
Bit
7
6
5
4
3
2
1
0
Symbol
CHED[3:0]
reserved
Reset
0
0
0
0
0
0
0
0
Access
R
R
R
R
-
-
-
-
9397 750 10015
Product data
Rev. 01 — 06 February 2003
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
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