UMA1015AM Datasheet, PDF (4/24 Pages) NXP Semiconductors – Low-power dual frequency synthesizer for radio communications

Philips Semiconductors
Low-power dual frequency synthesizer
for radio communications
Product specification
UMA1015AM
PINNING
SYMBOL PIN
DESCRIPTION
P1
1 output Port 1
P2
2 output Port 2
CPA
3 charge pump output synthesizer A
V_DD1
HPD
4 digital supply voltage 1
5 hardware power-down
(input LOW = power-down)
RFA
6 RF input synthesizer A
DGND
7 digital ground
f_XTALIN
8 common crystal frequency input from
TCXO
P3
9 output Port 3
f_XTALO
CLK
10 open-drain output of f_XTAL signal
11 programming bus clock input
DATA
12 programming bus data input
E
13 programming bus enable input
(active LOW)
V_DD2
RFB
14 digital supply voltage 2
15 RF input synthesizer B
AGND
16 analog ground to charge pumps
CPB
17 charge pump output synthesizer B
V_CC
18 analog supply to charge pump;
external or voltage doubler output
P0/OOL 19 Port output 0/out-of-lock output
I_SET
20 regulator pin to set charge pump
currents
handbook, halfpage
P1 1
20 ISET
P2 2
19 P0/OOL
CPA 3
VDD1 ₄
18 VCC
17 CPB
HPD 5
16 AGND
UMA1015AM
RFA 6
15 RFB
DGND 7
fXTALIN 8
14 ^VDD2
13 E
P3 9
12 DATA
fXTALO ₁₀
11 CLK
MGG522
Fig.2 Pin configuration.
FUNCTIONAL DESCRIPTION
Main dividers
Each synthesizer has a fully programmable 17-bit main
divider. The RF input drives a pre-amplifier to provide the
clock to the first divider bit. The pre-amplifier has a high
input impedance, dominated by pin and pad capacitance.
The circuit operates with signal levels from below
50 mV (RMS) up to 250 mV (RMS), and at frequencies up
to 1.1 GHz. The high frequency sections of the divider are
implemented using bipolar transistors, while the slower
section uses CMOS technology. The range of division
ratios is 512 to 131071.
Reference divider
There is a common fully programmable 12-bit reference
divider for the two synthesizers. The input f_XTALIN drives a
pre-amplifier to provide the clock input for the reference
divider. This clock signal is also inverted and output on pin
f_XTALO (open drain). A crystal connected between f_XTALIN
and f_XTALO with suitable feedback components can be
used to make an oscillator. An extra divide-by-2 block
allows a reference comparison frequency for
synthesizer B to be half the frequency of synthesizer A.
This feature is selectable using the program bit SR. If the
programmed reference divider ratio is R then the ratio for
each synthesizer is as given in Table 1.
The range for the division ratio R is 8 to 4095. Opposite
edges of the divider output are used to drive the phase
detectors to ensure that active edges arrive at the phase
detectors of each synthesizer at different times. This
minimizes the potential for interference between the
charge pumps of each loop. The reference divider consists
of CMOS devices operating beyond 35 MHz.
1997 Sep 03
4