74ABT853 Datasheet, PDF (4/7 Pages) NXP Semiconductors – 8-bit transceiver with 9-bit parity checker/ generator and flag latch 3-State

Philips Semiconductors
8-bit transceiver with 9-bit parity checker/
generator and flag latch (3-State)
Product specification
74ABT853
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
V_CC
V_I
V_IH
V_IL
I_OH
I_OL
∆t/∆v
T_amb
DC supply voltage
Input voltage
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
Input transition rise or fall rate
Operating free-air temperature range
LIMITS
MIN
MAX
4.5
5.5
0
V_CC
2.0
0.8
–32
64
0
5
–40
+85
UNIT
V
V
V
V
mA
mA
ns/V
°C
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
T_amb = +25°C
T_amb = –40°C
to +85°C
UNIT
Min Typ Max Min Max
V_IK
Input clamp voltage
V_CC = 4.5V; I_IK = –18mA
V_CC = 4.5V; I_OH = –3mA; V_I = V_IL or V_IH
V_OH
High–level output voltage
All outputs except ERROR
V_CC = 5.0V; I_OH = –3mA; V_I = V_IL or V_IH
–0.9 –1.2
–1.2 V
2.5 3.5
2.5
V
3.0 4.0
3.0
V
V_CC = 4.5V; I_OH = –32mA; V_I = V_IL or V_IH
2.0 2.6
2.0
V
V_OL Low-level output voltage
V_CC = 4.5V; I_OL = 64mA; V_I = V_IL or V_IH
0.42 0.55
0.55 V
I_I
Input leakage Control pins V_CC = 5.5V; V_I = GND or 5.5V
current
Data pins
V_CC = 5.5V; V_I = GND or 5.5V
I_OFF Power-off leakage current
V_CC = 0.0V; V_O or V_I ≤ 4.5V
±0.01
±5
±5.0
±1.0
±100
±100
±1.0 µA
±100 µA
±100 µA
I_PU/PD
Power-up/down 3-State
output current³
V_CC = 2.1V; V_O = 0.5V; V_I = GND or V_CC;
V _OE = Don’t care
±5.0 ±50
±50 µA
I_IH + I_OZH 3-State output High current V_CC = 5.5V; V_O = 2.7V; V_I = V_IL or V_IH
5.0 50
50
µA
I_IL + I_OZL 3-State output Low current V_CC = 5.5V; V_O = 0.5V; V_I = V_IL or V_IH
–5.0 –50
–50 µA
I_CEX
I_O
Output high leakage current
Output current¹
V_CC = 5.5V; V_O = 5.5V; V_I = GND or V_CC
V_CC = 5.5V; V_O = 2.5V
5.0 50
50
µA
–50 –100 –180 –50 –180 mA
I_CCH
V_CC = 5.5V; Outputs High, V_I = GND or V_CC
0.5 250
250 µA
I_CCL Quiescent supply current
V_CC = 5.5V; Outputs Low, V_I = GND or V_CC
25
38
38 mA
I_CCZ
V_CC = 5.5V; Outputs 3-State;
V_I = GND or V_CC
0.5 50
50
µA
Outputs enabled, one input at 3.4V,
other inputs at V_CC or GND; V_CC = 5.5V
0.5 1.5
1.5 mA
∆I_CC
Additional supply current per Outputs 3-State, one data input at 3.4V,
input pin²
other inputs at V_CC or GND; V_CC = 5.5V
0.01 50
50
µA
Outputs 3-State, one enable input at 3.4V,
other inputs at V_CC or GND; V_CC = 5.5V
0.5 1.5
1.5 mA
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. This parameter is valid for any V_CC between 0V and 2.1V, with a transition time of up to 10msec. From V_CC = 2.1V to V_CC = 5V ± 10%, a
transition time of up to 100µsec is permitted. The ERROR output pin 10 is not included in this spec due to the open collector design.
1995 Sep 06
4