74ABT853 Datasheet, PDF (1/7 Pages) NXP Semiconductors – 8-bit transceiver with 9-bit parity checker/ generator and flag latch 3-State

Philips Semiconductors
8-bit transceiver with 9-bit parity checker/
generator and flag latch (3-State)
Product specification
74ABT853
FEATURES
• Low static and dynamic power dissipation with high speed and
high output drive
• Open-collector ERROR output
• Output capability: +64mA/–32mA
• Latch-up protection exceeds 500mA per Jedec Std 17
• ESD protection exceeds 2000 V per MIL STD 883 Method 3015
and 200 V per Machine Model
• Power-up 3-State
• Live insertion/extraction permitted
DESCRIPTION
The 74ABT853 high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
The 74ABT853 is an octal transceiver with a parity
generator/checker and is intended for bus–oriented applications.
When Output Enable A (OEA) is High, it will place the A outputs in a
high impedance state. Output Enable B (OEB) controls the B
outputs in the same way.
The parity generator creates an odd parity output (PARITY) when
OEB is Low. When OEA is Low, the parity of the B port, including
the PARITY input, is checked for odd parity. When an error is
detected, the error data is sent to the input of a latch. The error data
can then be passed, stored, cleared, or sampled depending on the
ENABLE and CLEAR control signals.
If both OEA and OEB are Low, data will flow from the A bus to the B
bus and the part is forced into an error condition which creates an
inverted PARITY output. This error condition can be used by the
designer for system diagnostics.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
t_PLH
t_PHL
t_PLH
t_PHL
C_IN
C_I/O
I_CCZ
Propagation delay
An to Bn or Bn to An
Propagation delay
An to PARITY
Input capacitance
I/O capacitance
Total supply current
CONDITIONS
T_amb = 25°C; GND = 0V
C_L = 50pF; V_CC = 5V
C_L = 50pF; V_CC = 5V
V_I = 0V or V_CC
Outputs disabled; V_O = 0V or V_CC
Outputs disabled; V_CC =5.5V
TYPICAL
3.4
7.4
4
7
50
UNIT
ns
ns
pF
pF
µA
ORDERING INFORMATION
PACKAGES
24-Pin Plastic DIP
24-Pin plastic SO
24-Pin Plastic SSOP Type II
24-Pin Plastic TSSOP Type I
TEMPERATURE RANGE
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
OUTSIDE NORTH AMERICA
74ABT853 N
74ABT853 D
74ABT853 DB
74ABT853 PW
NORTH AMERICA
74ABT853 N
74ABT853 D
74ABT853 DB
74ABT853PW DH
DWG NUMBER
SOT222-1
SOT137-1
SOT340-1
SOT355-1
PIN CONFIGURATION
LOGIC SYMBOL
OEA 1
A0 2
A1 3
A2 4
A3 5
A4 6
A5 7
A6 8
A7 9
ERROR 10
CLEAR 11
GND 12
24 _VCC
23 B0
22 B1
21 B2
20 B3
19 B4
18 B5
17 B6
16 B7
15 PARITY
14 OEB
13 ENABLE
TOP VIEW
1995 Sep 06
SA00262
1
23456789
A0 A1 A2 A3 A4 A5 A6 A7
14
OEB
1
OEA
PARITY
15
11
CLEAR
ERROR
10
13
ENABLE
B0 B1 B2 B3 B4 B5 B6 B7
23 22 21 20 19 18 17 16
SA00263
853-1672 15702