XA-G39 Datasheet, PDF (35/42 Pages) NXP Semiconductors – XA 16-bit microcontroller family XA 16-bit microcontroller 32K FLASH/1K RAM, watchdog, 2 UARTs

Philips Semiconductors
XA 16-bit microcontroller family
32K Flash/1K RAM, watchdog, 2 UARTs
Preliminary data
XA-G39
5. This parameter is provided for peripherals that have the data clocked in on the falling edge of the WR strobe. This is not usually the case,
and in most applications this parameter is not used.
6. Please note that the XA-G39 requires that extended data bus hold time (WM0 = 1) to be used with external bus write cycles.
7. Applies only to an external clock source, not when a crystal or ceramic resonator is connected to the XTAL1 and XTAL2 pins.
ALE
PSEN
MULTIPLEXED
ADDRESS AND DATA
UNMULTIPLEXED
ADDRESS
t_LHLL
t_AVLL t_LLPL
t_PLPH
t_LLAX
t_PLIV
t_PXIX
t_PXIZ
A4–A11 or A4–A19
INSTR IN *
t_AVIVA
t_IXUA
A0 or A1–A3, A12–19
* INSTR IN is either D0–D7 or D0–D15, depending on the bus width (8 or 16 bits).
Figure 20. External Program Memory Read Cycle (ALE Cycle)
SU01073
ALE
PSEN
MULTIPLEXED
ADDRESS AND DATA
UNMULTIPLEXED
ADDRESS
A4–A11 or A4–A19
INSTR IN *
A0 or A1–A3, A12–19
t_AVIVB
A0 or A1–A3, A12–19
* INSTR IN is either D0–D7 or D0–D15, depending on the bus width (8 or 16 bits).
Figure 21. External Program Memory Read Cycle (Non-ALE Cycle)
SU00707
2002 Mar 13
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