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XA-G39 Datasheet, PDF (29/42 Pages) NXP Semiconductors – XA 16-bit microcontroller family XA 16-bit microcontroller 32K FLASH/1K RAM, watchdog, 2 UARTs
Philips Semiconductors
XA 16-bit microcontroller family
32K Flash/1K RAM, watchdog, 2 UARTs
Preliminary data
XA-G39
SnCON Address: S0CON 420
S1CON 424
MSB
Bit Addressable
Reset Value: 00H
SM0 SM1 SM2 REN TB8 RB8
TI
Where SM0, SM1 specify the serial port mode, as follows:
SM0
0
0
1
1
SM1
0
1
0
1
Mode
0
1
2
3
Description
shift register
8-bit UART
9-bit UART
9-bit UART
Baud Rate
fOSC/16
variable
fOSC/32
variable
LSB
RI
BIT
SnCON.5
SnCON.4
SnCON.3
SnCON.2
SnCON.1
SnCON.0
SYMBOL
SM2
REN
TB8
RB8
TI
RI
FUNCTION
Enables the multiprocessor communication feature in Modes 2 and 3. In Mode 2 or 3, if SM2 is set to 1, then RI
will not be activated if the received 9th data bit (RB8) is 0. In Mode 1, if SM2=1 then RI will not be activated if a
valid stop bit was not received. In Mode 0, SM2 should be 0.
Enables serial reception. Set by software to enable reception. Clear by software to disable reception.
The 9th data bit that will be transmitted in Modes 2 and 3. Set or clear by software as desired. The TB8 bit is not
double buffered. See text for details.
In Modes 2 and 3, is the 9th data bit that was received. In Mode 1, if SM2=0, RB8 is the stop bit that was
received. In Mode 0, RB8 is not used.
Transmit interrupt flag. Set when another byte may be written to the UART transmitter. See text for details.
Must be cleared by software.
Receive interrupt flag. Set by hardware at the end of the 8th bit time in Mode 0, or at the end of the stop bit time
in the other modes (except see SM2). Must be cleared by software.
SU00597C
Figure 16. Serial Port Control (SnCON) Register
D0
D1
D2
D3
D4
D5
D6
D7
D8
START
BIT
DATA BYTE
ONLY IN STOP
MODE 2, 3 BIT
if 0, sets FE
—
—
—
—
FEn
BRn
OEn STINTn SnSTAT
SU00598
Figure 17. UART Framing Error Detection
2002 Mar 13
D0
D1
D2
D3
D4
D5
D6
D7
D8
SM0_n SM1_n
1
1
1
0
SM2_n REN_n
1
1
TB8_n
X
RB8_n TI_n
RI_n SnCON
RECEIVED ADDRESS D0 TO D7
PROGRAMMED ADDRESS
COMPARATOR
IN UART MODE 2 OR MODE 3 AND SM2 = 1:
INTERRUPT IF REN=1, RB8=1 AND “RECEIVED ADDRESS” = “PROGRAMMED ADDRESS”
– WHEN OWN ADDRESS RECEIVED, CLEAR SM2 TO RECEIVE DATA BYTES
– WHEN ALL DATA BYTES HAVE BEEN RECEIVED: SET SM2 TO WAIT FOR NEXT ADDRESS.
Figure 18. UART Multiprocessor Communication, Automatic Address Recognition
29
SU00613