PHP109 Datasheet, PDF (3/12 Pages) NXP Semiconductors – P-channel enhancement mode MOS transistor

Philips Semiconductors
P-channel enhancement mode
MOS transistor
Product specification
PHP109
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
PARAMETER
V_DS
drain-source voltage (DC)
V_GS
gate-source voltage (DC)
I_D
drain current (DC)
I_DM
peak drain current
P_tot
total power dissipation
T_stg
storage temperature
T_j
operating junction temperature
Source-drain diode
I_S
source current (DC)
I_SM
peak pulsed source current
CONDITIONS
T_s = 80 °C; note 1
note 2
T_s = 80 °C
T_amb = 25 °C; note 3
T_amb = 25 °C; note 4
T_s = 80 °C
note 2
MIN.
−
−
−
−
−
−
−
−65
−65
−
−
Notes
1. T_s is the temperature at the soldering point of the drain lead.
2. Pulse width and duty cycle limited by maximum junction temperature.
3. Value based on a printed-circuit board with a R_{th a-tp} (ambient to tie-point) of 27.5 K/W.
4. Value based on a printed-circuit board with a R_{th a-tp} (ambient to tie-point) of 90 K/W.
MAX.
−30
±20
−5
−20
4
2.7
1.15
+150
+150
UNIT
V
V
A
A
W
W
W
°C
°C
−3
A
−12
A
handbook,¹h⁰alfpage
Ptot
(W)
8
6
4
2
0
0
50
MGD381
100
150 _{Ts (oC)} 200
Fig.2 Power derating curve.
−10²
handbook, halfpage
ID
(A)
−10
(1)
−1 P
DC
δ
=
tp
T
MGD382
tp ₌
10 µs
100 µs
1 ms
10 ms
−10^−1
−10^−1
tp
t
T
−1
100 ms
−10
−10²
VDS (V)
δ = 0.01; T_S = 80 °C.
(1) R_{DSon limitation}.
Fig.3 SOAR.
1997 Jun 18
3