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CGY2030M Datasheet, PDF (3/12 Pages) NXP Semiconductors – DECT 500 mW power amplifier
Philips Semiconductors
DECT 500 mW power amplifier
Product specification
CGY2030M
PINNING
SYMBOL
VGG2
GND
VDD2
GND
VDD1
RFI
VGG1
GND
VDD3
GND
RFO/VDD4
PIN
DESCRIPTION
1
fourth stage negative gate
supply voltage
2 to 4 ground
5
second stage supply voltage
6 and 7 ground
8
first stage supply voltage
9
PA input
10 first second and third stages
negative gate supply voltage
11 and 12 ground
13 third stage supply voltage
14 and 15 ground
16 PA output and fourth stage
supply voltage
handbook, halfpage
VGG2 1
16 RFO/VDD4
GND 2
15 GND
GND 3
14 GND
GND 4
13 VDD3
CGY2030M
VDD2 5
12 GND
GND 6
11 GND
GND 7
10 VGG1
VDD1 8
9 RFI
MBG630
Fig.2 Pin configuration.
FUNCTIONAL DESCRIPTION
Amplifier
The CGY2030M is a 4-stage GaAs MESFET power
amplifier capable of delivering 500 mW (typ.) at 1.9 GHz
into a 50 Ω load. Each amplifier stage has an open-drain
configuration. The drains have to be loaded externally by
adequate reactive circuits which must also provide a DC
path to the supply.
The amplifier can be switched off by means of an external
PNP series switch connected between the battery and the
amplifier drains. This switch can also be used to vary the
actual supply voltage applied to the amplifier and hence,
control the output power.
This device is specifically designed to work with a
maximum duty factor of 25%.
Biasing
Two modes of operation are possible:
• Mode 1
• Mode 2.
MODE 1
In the first mode, the pins VGG1 and VGG2 are simply
connected together to the ground via resistors (10 kΩ in
the evaluation board; see Fig.4). The amplifier biases itself
internally to a negative voltage by action of the incoming
RF signal. In this mode, power control cannot be achieved
by varying the amplifier supply voltage; therefore it is
suitable only for applications where power control is not
required such as DECT.
MODE 2
If a negative bias is available, a second mode of operation
is possible, in which the amplifier is biased by providing
adequate negative voltages at pins VGG1 and VGG2. In this
mode, the amplifier internal bias does not depend on the
incoming RF level, nor on the drain voltage, so that power
control is possible by variation of the supply voltage.
1997 Jan 17
3