74HC595 Datasheet, PDF (20/28 Pages) NXP Semiconductors – 8-bit serial-in/serial or parallel-out shift register with output latches; 3-state

Philips Semiconductors
8-bit serial-in, serial or parallel-out shift
register with output latches; 3-state
Product specification
74HC595; 74HCT595
handbook, full pagewidth
SH_CP input
DS input
VM
tsu
th
VM
tsu
th
Q7' output
VM
MLB196
74HC595: V_M = 50%; V_I = GND to V_CC.
74HCT595: V_M = 1.3 V; V_I = GND to 3 V.
The shaded areas indicate when the input is permitted to change for predictable output performance.
Fig.9 Waveforms showing the data set-up and hold times for the DS input.
handbook, full pagewidth
MR input
SH_CP input
Q7' output
VM
tW
trem
VM
tPHL
VM
MLB197
74HC595: V_M = 50%; V_I = GND to V_CC.
74HCT595: V_M = 1.3 V; V_I = GND to 3 V.
Fig.10 Waveforms showing the Master Reset (MR) pulse width, the master reset to output (Q7’) propagation
delay and the master reset to shift clock (SH_CP) removal time.
2003 Jun 25
20