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74HC595 Datasheet, PDF (15/28 Pages) NXP Semiconductors – 8-bit serial-in/serial or parallel-out shift register with output latches; 3-state
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Philips Semiconductors
8-bit serial-in, serial or parallel-out shift
register with output latches; 3-state
Product specification
74HC595; 74HCT595
SYMBOL
PARAMETER
TEST CONDITIONS
WAVEFORMS VCC (V)
MIN.
th
hold time DS to SH_CP see Fig.9
2.0
3
4.5
3
6.0
3
trem
removal time MR to SH_CP see Fig.10
2.0
65
4.5
13
6.0
11
fmax
maximum clock
see Figs 7 and 8 2.0
4.8
pulse frequency
4.5
24
SH_CP or ST_CP
6.0
28
Tamb = −40 to +125 °C
tPHL/tPLH
propagation delay
SH_CP to Q7’
see Fig.7
propagation delay
ST_CP to Qn
see Fig.8
tPHL
propagation delay
MR to Q7’
see Fig.10
tPZH/tPZL
3-state output enable time see Fig.11
OE to Qn
tPHZ/tPLZ
3-state output disable time see Fig.11
OE to Qn
2.0
−
4.5
−
6.0
−
2.0
−
4.5
−
6.0
−
2.0
−
4.5
−
6.0
−
2.0
−
4.5
−
6.0
−
2.0
−
4.5
−
6.0
−
tW
shift clock pulse width
see Fig.7
2.0
110
HIGH or LOW
4.5
22
6.0
19
storage clock pulse width see Fig.8
HIGH or LOW
2.0
110
4.5
22
6.0
19
master reset pulse width
LOW
see Fig.10
2.0
110
4.5
22
6.0
19
TYP.
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
MAX.
−
−
−
−
−
−
−
−
−
240
48
41
265
53
45
265
53
45
225
45
38
225
45
38
−
−
−
−
−
−
−
−
−
UNIT
ns
ns
ns
ns
ns
ns
MHz
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
2003 Jun 25
15
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