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UMA1015M Datasheet, PDF (2/24 Pages) NXP Semiconductors – Low-power dual frequency synthesizer for radio communications
Philips Semiconductors
Low-power dual frequency synthesizer
for radio communications
Product specification
UMA1015M
FEATURES
• Two fully programmable RF dividers up to 1.1 GHz
• Fully programmable reference divider up to 35 MHz
• 2 : 1 or 1 : 1 ratio of selectable reference frequencies
• Fast three-line serial bus interface
• Adjustable phase comparator gain
• Programmable out-of-lock indication for both loops
• On-chip voltage doubler
• Low current consumption from 3 V supply
• Separate power-down mode for each synthesizer
• Up to 4 open-drain output ports.
APPLICATIONS
• Cordless telephone
• Hand-held mobile radio.
GENERAL DESCRIPTION
The UMA1015M is a low-power dual frequency
synthesizer for radio communications which operates in
the 50 to 1100 MHz frequency range. Each synthesizer
consists of a fully programmable main divider, a phase and
frequency detector and a charge pump. There is a fully
programmable reference divider common to both
synthesizers which operates up to 35 MHz. The device is
programmed via a 3-wire serial bus which operates up to
10 MHz. The charge pump currents (gains) are fixed by an
external resistance at pin 20 (ISET). The BiCMOS device is
designed to operate from 2.6 V (3 Ni-Cd cells) to 5.5 V at
low current. Digital supplies VDD1 and VDD2 must be at the
same potential. The charge pump supply (VCC) can be
provided by an external source or on-chip voltage doubler.
VCC must be equal to or higher than VDD1. Each
synthesizer can be powered-down independently via the
serial bus to save current. It is also possible to power-down
the device via the HPD input (pin 5).
QUICK REFERENCE DATA
SYMBOL
VDD1, VDD2
VCC
VCCvd
IDDO1 +IDDO2 +
ICCO
IDD1pd + IDD2pd
+ ICCpd
IDD1pd
fRFA, fRFB
fXTALIN
fpc(min)
fpc(max)
Tamb
PARAMETER
digital supply voltage
charge pump supply
voltage
charge pump supply from
voltage doubler
operating supply current
current in power-down
mode per supply
current in power-down
mode from supply VDD
RF input frequency for
each synthesizer
crystal input frequency
minimum phase
comparator frequency
maximum phase
comparator frequency
operating ambient
temperature
CONDITIONS
VDD1 = VDD2
external supply; doubler
disabled; VCC ≥ VDD
doubler enabled
MIN.
TYP.
2.6 −
2.6 −
MAX. UNIT
5.5 V
6.0 V
−
2VDD1 − 0.6 6.0
V
both synthesizers ON; doubler −
disabled; VDD1 = VDD2 = 5.5 V
doubler disabled;
−
VDD1 = VDD2 = 5.5 V
doubler enabled;
−
VDD1 = VDD2 = 3 V
50
9.6
0.01
0.15
−
−
mA
−
mA
−
mA
1100 MHz
fRF = 50 to 1100 MHz;
fXTALIN = 3 to 35 MHz
fRF = 50 to 1100 MHz;
fXTALIN = 3 to 35 MHz
synthesizer A
2.6 V ≤ VDD ≤ 5.5 V
synthesizer B
2.6 V ≤ VDD ≤ 4.5 V
synthesizer B
2.6 V ≤ VDD ≤ 5.0 V
3
−
−
10
−
750
−30 −
−30 −
0
−
35
MHz
−
kHz
−
kHz
+85 °C
+85 °C
+85 °C
1995 Jun 22
2