UMA1015M Datasheet, PDF (10/24 Pages) NXP Semiconductors – Low-power dual frequency synthesizer for radio communications

Philips Semiconductors
Low-power dual frequency synthesizer
for radio communications
Product specification
UMA1015M
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
Logic input signal levels; DATA, CLK, E and HPD
V_IH
HIGH level input voltage at logic 1
0.7V_DD1
−
V_IL
LOW level input voltage at logic 0
−0.3
−
I_bias
input bias currents
at logic 1 or logic 0
−5
−
C_I
input capacitance
indicative, not tested
−
1
Port outputs/Out-of-lock; P0/OOL, P1, P2, P3 and f_XTALO - open drain outputs
V_OL
LOW level output voltage I_sink = 0.4 mA
−
−
MAX. UNIT
V_DD1 + 0.3 V
0.3V_DD1
V
+5
µA
−
pF
0.4
V
SERIAL TIMING CHARACTERISTICS
V_DD1 = 3 V; T_amb = 25 °C unless otherwise specified.
SYMBOL
PARAMETER
Serial programming clock; CLK
t_r, t_f
input rise and fall times
t_cy
clock period
Enable programming; E
t_START
t_END
t_W
t_SU;E
delay to rising clock edge
delay from last falling clock edge
minimum inactive pulse width
enable set-up time to next clock edge
Register serial input data; DATA
t_SU;DAT
t_HD;DAT
input data to clock set-up time
input data to clock hold time
MIN.
TYP.
MAX. UNIT
−
10
40
ns
100
−
−
ns
40
−
−
ns
−20
−
−
ns
4 000
−
−
ns
20
−
−
ns
20
−
−
ns
20
−
−
ns
1995 Jun 22
Fig.3 Serial bus timing diagram.
10