SA5222 Datasheet, PDF (2/8 Pages) NXP Semiconductors – Low-power FDDI transimpedance amplifier

Philips Semiconductors
Low-power FDDI transimpedance amplifier
Product specification
SA5222
DC ELECTRICAL CHARACTERISTICS
Typical data and Min and Max limits apply at T_A = 25°C, and V_CC1 = V_CC2 = +5V, unless otherwise specified.
SYMBOL
PARAMETER
TEST CONDITIONS
SA5222
Min Typ
V_IN Input bias voltage
1.3 1.55
V_O± Output bias voltage
2.9
3.2
V_OS Output offset voltage
0
I_CC Supply current
6
9
I_OMAX
I_IN
I_INMAX
V_OMAX
Output sink/source current
Input current (2% linearity)
Maximum input current overload threshold
Maximum differential output voltage swing
Test circuit 5, Procedure 2
Test circuit 5, Procedure 4
R_L = ∞, Test Circuit 5, Procedure 3
1.5
2
±60 ±90
±80 ±115
3.6
Max
1.8
3.5
±100
12
UNIT
V
V
mV
mA
mA
µA
µA
V_P-P
AC ELECTRICAL CHARACTERISTICS
Typical data and Min and Max limits apply at T_A = 25°C and V_CC1 = V_CC2 =+5V, unless otherwise specified.
SYMBOL
PARAMETER
TEST CONDITIONS
SA5222
Min Typ Max
R_T
Transresistance (differential output)
DC tested, R_L = ∞, Test Circuit 5,
Procedure 1
13.3 16.6 19.9
UNIT
kΩ
R_O
Output resistance
(differential output)
DC tested
30
60
90
Ω
R_T
Transresistance
(single-ended output)
DC tested, R_L = ∞
6.65 8.3 9.95
kΩ
R_O
f_3dB
R_IN
C_IN
∆R/∆V
∆R/∆T
I_IN
I_T
Output resistance
(single-ended output)
Bandwidth (-3dB)¹
Input resistance
Input capacitance²
Transresistance power supply sensitivity
Transresistance ambient temperature sensi-
tivity
RMS noise current spectral density (referred
to input)
Integrated RMS noise current over the band-
width (referred to input)
C_S = 0pF
C_S = 1pF
DC tested
Test Circuit 1
V_CC1 = V_CC2 = 5 ±0.5V
∆T_A = T_{A MAX} - T_{A MIN}
Test Circuit 2, f = 10MHz
Test circuit 2,
∆f = 50MHz
∆f = 100MHz
∆f = 150MHz
∆f = 50MHz
∆f = 100MHz
15
30
45
110 140
150
1
1.0
0.07
Ω
MHz
Ω
pF
%/V
%/^oC
2.0
pAń ^ǸHz
15
25
36
nA
17
35
PSRR
PSRR
I_INMAX
Power supply rejection ratio
Power supply rejection ratio³
Maximum input amplitude for output duty
cycle of 50 ±5%⁴
∆f = 150MHz
DC Tested, ∆V_CC = ±0.5V
f = 1.0MHz, Test Circuit 3
Test circuit 4
55
–55
dB
–34
dB
±120
µA
t_r, t_f Rise and fall times
10 – 90%
2.2
ns
t_D
Group delay
f = 10MHz
2.2
ns
NOTES:
1. Bandwidth is tested into 50Ω load. Bandwidth into 1kΩ load is approximately 165MHz.
2. Does not include Miller-multiplied capacitance of input device.
3. PSRR is output referenced and is circuit board layout dependent at higher frequencies. For best performance use a RF filter in V_CC line.
4. Monitored in production via linearity and over load tests.
1995 Apr 26
2