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PHP52N06T Datasheet, PDF (2/12 Pages) NXP Semiconductors – N-channel enhancement mode field-effect transistor
Philips Semiconductors
PHP52N06T
N-channel enhancement mode field-effect transistor
5. Quick reference data
Table 2: Quick reference data
Symbol Parameter
Conditions
Typ
VDS
drain-source voltage (DC)
-
ID
drain current (DC)
Tmb = 25 °C; VGS = 10 V
-
Ptot
total power dissipation
Tmb = 25 °C
-
Tj
junction temperature
-
RDSon drain-source on-state resistance VGS = 10 V; ID = 25 A
Tj = 25 °C
17
Tj = 175 °C
-
6. Limiting values
Table 3: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
Min
VDS
drain-source voltage (DC)
-
VDGR drain-gate voltage (DC)
RGS = 20 kΩ
-
VGS
gate-source voltage (DC)
-
ID
drain current (DC)
Tmb = 25 °C; VGS = 10 V; Figure 2 and 3
-
Tmb = 100 °C; VGS = 10 V; Figure 2
-
IDM
peak drain current
Tmb = 25 °C; pulsed; tp ≤ 10 µs; Figure 3
-
Ptot
total power dissipation
Tmb = 25 °C; Figure 1
-
Tstg
storage temperature
−55
Tj
operating junction temperature
−55
Source-drain diode
IS
source (diode forward) current (DC) Tmb = 25 °C
-
ISM
peak source (diode forward) current Tmb = 25 °C; pulsed; tp ≤ 10 µs
-
Avalanche ruggedness
EDS(AL) non-repetitive avalanche energy
unclamped inductive load; ID = 48 A;
-
VDS ≤ 55 V; VGS = 10 V; RGS = 50 Ω; starting
Tmb = 25 °C
Max Unit
60
V
52
A
118
W
175
°C
22
mΩ
44
mΩ
Max Unit
60
V
60
V
±20
V
52
A
37
A
208
A
120
W
+175 °C
+175 °C
52
A
208
A
115
mJ
9397 750 09121
Product data
Rev. 01 — 9 January 2002
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
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