74ABT544 Datasheet, PDF (2/19 Pages) NXP Semiconductors – Octal latched transceiver with dual enable, inverting 3-State

Philips Semiconductors
74ABT544
Octal latched transceiver with dual enable; inverting; 3-state
3. Quick reference data
Table 1: Quick reference data
T_amb = 25 °C; GND = 0 V.
Symbol Parameter
Conditions
t_PLH
propagation delay An C_L = 50 pF; V_CC = 5 V
to Bn or Bn to An
t_PHL
propagation delay An C_L = 50 pF; V_CC = 5 V
to Bn or Bn to An
C_I
input capacitance
V_I = 0 V or V_CC
C_I/O
I/O capacitance
outputs disabled; V_O = 0 V or V_CC
I_CC
quiescent supply
outputs 3-state; V_CC = 5.5 V
current
Min Typ Max Unit
-
3.0 -
ns
-
3.6 -
ns
-
4
-
pF
-
7
-
pF
-
110 -
µA
4. Ordering information
Table 2: Ordering information
Type number Package
Temperature range Name
Description
Version
74ABT544D −40 °C to +85 °C SO24
plastic small outline package; 24 leads; body width 7.5 mm SOT137-1
74ABT544N −40 °C to +85 °C DIP24
plastic dual in-line package; 24 leads (300 mil)
SOT222-1
74ABT544DB −40 °C to +85 °C
SSOP24 plastic shrink small outline package; 24 leads; body width SOT340-1
5.3 mm
74ABT544PW −40 °C to +85 °C
TSSOP24 plastic thin shrink small outline package; 24 leads; body
width 4.4 mm
SOT355-1
5. Functional diagram
9397 750 14756
Product data sheet
3 4 5 6 7 8 9 10
A0 A1 A2 A3 A4 A5 A6 A7
11 EAB
23 EBA
OEAB 13
14 LEAB
OEBA 2
1 LEBA
B0 B1 B2 B3 B4 B5 B6 B7
22 21 20 19 18 17 16 15
001aac756
Fig 1. Logic symbol
2 _{1EN3 (AB)}
23 _G1
1 _1C5
13 _{2EN4 (BA)}
11 _G2
14 _2C6
3
3
5D
4
5
6
7
8
9
10
22
5D
4
21
20
19
18
17
16
15
001aac757
Fig 2. IEC logic symbol
Rev. 03 — 20 April 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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