 English |
|
|
|
|
|
|
|
| 74ABT544 Datasheet, PDF (12/19 Pages) NXP Semiconductors – Octal latched transceiver with dual enable, inverting 3-State | |||
| |||
| ◁ |
Philips Semiconductors
13. Test information
74ABT544
Octal latched transceiver with dual enable; inverting; 3-state
VI
negative
pulse
0V
90 %
VI
positive
pulse
0V
10 %
VM = 1.5 V.
a. Input pulse deï¬nition
tW
VM
10 %
tTHL (tf)
tTLH (tr)
90 %
VM
VM
10 %
90 %
VM
tW
90 %
tTLH (tr)
tTHL (tf)
10 %
001aac765
PULSE
VI
GENERATOR
VCC
VO
DUT
RT
VEXT
RL
CL RL
001aac764
Test data is given in Table 9.
Deï¬nitions test circuit:
RL = Load resistor.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
b. Test circuit for 3-state outputs
Fig 10. Load circuitry for switching times
Table 9: Test data
Input
VI
3.0 V
fi
1 MHz
tW
500 ns
tr, tf
2.5 ns
Load
CL
50 pF
RL
500 â¦
VEXT
tPHZ, tPZH
open
tPLZ, tPZL
7.0 V
tPLH, tPHL
open
9397 750 14756
Product data sheet
Rev. 03 â 20 April 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
12 of 19
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese