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74ABT544 Datasheet, PDF (11/19 Pages) NXP Semiconductors – Octal latched transceiver with dual enable, inverting 3-State
Philips Semiconductors
74ABT544
Octal latched transceiver with dual enable; inverting; 3-state
VI
OEAB, OEBA,
EAB, EBA input
GND
VOH
An, Bn output
VOL
VM
VM
t PZH
t PHZ
VM
VOH − 0.3 V
001aac760
Fig 7.
VM = 1.5 V.
VOL and VOH are typical voltage output drop that occur with the output load.
3-state output enable time to HIGH-level and output disable time from HIGH-level
VI
OEAB, OEBA,
EAB, EBA input
GND
VOH
An, Bn output
VOL
VM
VM
t PZL
t PLZ
VM
VOL + 0.3 V
001aac762
Fig 8.
VM = 1.5 V.
VOL and VOH are typical voltage output drop that occur with the output load.
3-state output enable time to LOW-level and output disable time from LOW-level
VOH
LEAB, LEBA input
VOL
VI
An, Bn input
GND
VM
VM
VM
tsu(H) th(H)
VM
twL
VM
VM
t s u (L)
t h (L)
001aac763
VM = 1.5 V.
The shaded areas indicate when the input is permitted to change for predictable output
performance.
Fig 9. Data set-up and hold times and latch enable pulse width
9397 750 14756
Product data sheet
Rev. 03 — 20 April 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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