TDA8360 Datasheet, PDF (19/36 Pages) NXP Semiconductors – Integrated PAL and PAL/NTSC TV processors

Philips Semiconductors
Integrated PAL and PAL/NTSC TV
processors
Objective specification
TDA8360; TDA8361; TDA8362
SYMBOL
PARAMETER
CONDITIONS
VERTICAL OUTPUT (PIN 43)
I_O
available output current
I_int
internal bias current of NPN emitter
follower
V_O(max)
V_O(min)
maximum available output voltage
minimum available output voltage
VERTICAL FEEDBACK INPUT (PIN 41)
V₄₁
V₄₁
I₄₁
∆t_p
∆T/∆V
DC input voltage
AC input voltage
input current
internal pre-correction to sawtooth
temperature dependency on
amplitude
V_GL
vertical guard switching level with
respect to the DC feedback level;
switching level LOW
V_GH
vertical guard switching level with
respect to the DC feedback level;
switching level HIGH
t_d
delay of scan start
Colour demodulation part
note 7
note 35
∆T = 40 °C
power on at 60 Hz
CHROMINANCE AMPLIFIER
ACC_cr
∆V
ACC control range
change in amplitude of the output
signals over the ACC range
THR_on
HYS_off
threshold colour killer ON
hysteresis colour killer OFF
strong input signal
noisy input signal
note 36
note 7
S/N ≥ 40 dB
ACL CIRCUIT
chrominance burst ratio at which the
ACL starts to operate
REFERENCE PART
Phase-locked loop; note 37
f_CR
catching range
∆ϕ
phase shift for a ±200 Hz deviation of note 7
the oscillator frequency
MIN. TYP. MAX. UNIT
1
−
−
mA
−
0.2
−
mA
4
−
−
V
−
−
0.3
V
2.0
2.5
3.0
V
−
1
−
V
−
−
15
µA
−
3
−
%
−
−
1
%
−
−
−1.5
V
−
−
+1.5
V
−
140
−
ms
26
−
−
−
−30
−
−
+3
−
+1
2.3
−
−
dB
2
dB
−38
dB
−
dB
−
dB
2.7
300
−
−
Hz
−
−
2
deg
March 1994
19