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TDA8360 Datasheet, PDF (18/36 Pages) NXP Semiconductors – Integrated PAL and PAL/NTSC TV processors
Philips Semiconductors
Integrated PAL and PAL/NTSC TV
processors
Objective specification
TDA8360; TDA8361; TDA8362
SYMBOL
PARAMETER
CONDITIONS
MIN.
SECOND CONTROL LOOP; NOTE 32 (CAPACITOR CONNECTED TO PIN 39)
∆ϕi/∆ϕo
tcr
control sensitivity
without RL on pin 39 −
control range from start of horizontal
11
output to flyback
tshift
maximum horizontal shift range
note 7
±2
∆ϕi/∆ϕo
shift control sensitivity
note 7
−
V39
voltage to switch on the X-ray
6
protection
II
input current during protection
−
HORIZONTAL OUTPUT (PIN 37)
VOL
LOW level output voltage
IO = 10 mA
−
IO(max)
maximum allowed output current
10
VO(max)
maximum allowed output voltage
−
δdf
duty factor
note 7
−
FLYBACK INPUT/SANDCASTLE OUTPUT (PIN 38)
I38
required input current during flyback note 7
100
pulse
VO
output voltage during burst key
4.8
VO
output voltage during blanking
1.8
VIcl
clamped input voltage during flyback
2.6
tW
burst key pulse width
3.3
tW
vertical blanking pulse width
note 33
−
td
delay of start of burst key to start
5.2
of sync
VERTICAL SECTION; NOTE 34
ffr
free running frequency
−
flock
locking range
45
divider value not locked
−
locking range (lines/frame)
488
VERTICAL RAMP GENERATOR (PIN 42)
I42
input current during scan
note 7
−
Idis
discharge current during retrace
−
Vsaw(p-p)
sawtooth amplitude
(peak-to-peak value)
in 50 Hz mode
−
td
delay from field-to-field
−
TYP. MAX.
150
−
12
−
−
−
3
−
−
−
−
tbf
−
0.3
−
−
−
VP
50
−
−
300
5.3
5.8
2.0
2.2
3.0
3.4
3.5
3.7
14
−
5.4
5.6
50/60 −
−
64.5
625/525 −
−
722
−
2
0.3
−
1.5
1.8
−
1.6
UNIT
µs/µs
µs
µs
µA/µs
V
µA
V
mA
V
%
µA
V
V
V
µs
lines
µs
Hz
Hz
µA
mA
V
µs
March 1994
18