PR31100 Datasheet, PDF (19/26 Pages) NXP Semiconductors – Highly integrated embedded processor

Philips Semiconductors
Highly integrated embedded processor
Preliminary specification
MIPS
PR31100
MAGIC BUS TIMING DIAGRAMS
MBUSCLK
1
2
MBUSDATA
3
4
Figure 8. Magic Bus Output and Clock Timing (Master, PHAPOL = 1)
MBUSCLK
MBUSDATA
5
6
Figure 9. Magic Bus Input Timing (Slave, RCVPHAPOL = 0)
MBUSCLK
MBUSDATA
7
Figure 10. Magic Bus Output and Clock Timing (Master, PHAPOL = 0)
MBUSCLK
MBUSDATA
8
9
Figure 11. Magic Bus Input Timing (Slave, RCVPHAPOL = 1)
1996 Aug 07
19