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83C754 Datasheet, PDF (16/26 Pages) NXP Semiconductors – 80C51 8-bit microcontroller family 4K/256 OTP/ROM, DAC, comparator, UART, reference
Philips Semiconductors
80C51 8-bit microcontroller family
4K/256 OTP/ROM, DAC, comparator, UART, reference
Preliminary specification
83C754/87C754
ABSOLUTE MAXIMUM RATINGS1, 3, 4
PARAMETER
Storage temperature range
Voltage from VCC to VSS
Voltage from any pin to VSS (except VPP)
Power dissipation
Voltage from VPP pin to VSS
RATING
–65 to +150
–0.5 to +6.5
–0.5 to VCC + 0.5
1.0
–0.5 to + 13.0
UNIT
°C
V
V
W
V
DC ELECTRICAL CHARACTERISTICS
Tamb = 0°C to +70°C, AVCC = 5V ±5, AVSS = 0V4
VCC = 5V ± 10%, VSS = 0V
SYMBOL
PARAMETER
TEST CONDITIONS
LIMITS4
UNIT
MIN
TYP1
MAX
ICC
Inputs
Supply current (see Figure 19)
VIL
VIH
VIH1
Outputs
VOL
VOL1
VOH
ILI
IIL
CIO
Input low voltage, port 1, 3
Input high voltage, port 1, 3
Input high voltage, X1, RST
Output low voltage, port 3
Output low voltage, port 1.0, 1.1, 1.2
Output high voltage, ports 3, 1.0, 1.1
Input leakage current, port 1, 3, RST
Logical 0 input cirrent, ports 1 and 3
Pin capacitance
IPD
Power-down current5
IOL = 1.6mA2
IOL = 3.2mA2
IOH = –60µA,
0.45 < VIN < VCC
VIN = 0.45V
Test freq = 1MHz,
Tamb = 25°C
VCC = 2 to 5.5V
VCC = 2 to 6.0V
(83C754)
–0.5
0.2VCC+0.9
0.7VCC
2.4
0.2VCC–0.1
V
VCC+0.5
V
VCC+0.5
V
0.45
V
0.45
V
V
+10
µA
–50
µA
10
pF
50
µA
VPP
VPP program voltage (87C754 only)
VSS = 0V
VCC = 5V±10%
Tamb = 21°C to 27°C
12.5
13.0
V
IPP
Program current (87C754 only)
VPP = 13.0V
50
mA
NOTES:
1. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any conditions other than those described in the AC and DC Electrical Characteristics section
of this specification is not implied.
2. Under steady state (non-transient) conditions, IOL must be externally limited as follows:
Maximum IOL per port pin:
10mA
Maximum IOL per 8-bit port:
26mA
Maximum total IOL for all outputs: 67mA
If IOL exceeds the test condition, VOL may exceed the related specification. Pins are not guaranteed to sink current greater than the listed
test conditions.
3. This product includes circuitry specifically designed for the protection of its internal devices from the damaging effects of excessive static
charge. Nonetheless, it is suggested that conventional precautions be taken to avoid applying greater than the rated maxima.
4. Parameters are valid over operating temperature range unless otherwise specified. All voltages are with respect to VSS unless otherwise
noted.
5. Power-down ICC is measured with all output pins disconnected; port 0 = VCC; X2, X1 n.c.; RST = VSS.
6. ICC is measured with all output pins disconnected; X1 driven with tCLCH, tCHCL = 5ns, VIL = VSS + 0.5V, VIH = VCC – 0.5V; X2 n.c.;
RST = port 0 = VCC. ICC will be slightly higher if a crystal oscillator is used.
7. Idle ICC is measured with all output pins disconnected; X1 driven with tCLCH, tCHCL = 5ns, VIL = VSS + 0.5V, VIH = VCC – 0.5V; X2 n.c.;
port 0 = VCC; RST = VSS.
8. Load capacitance for ports = 80pF.
1998 Apr 23
16