TDA8005A Datasheet, PDF (14/36 Pages) NXP Semiconductors – Low-power 3 V/5 V smart card coupler

Philips Semiconductors
Low-power (3 V/5 V) smart card coupler
Preliminary specification
TDA8005A
The following occurs in the transmission mode (see Fig.7):
• Transmission according to the convention detected
during ATR, consequently the microcontroller only has
to send characters in direct convention; transmission of
the next character may start at 12 ETU in the event of no
error or 13 ETU in case of error
• Parity calculation and detection of repetition request
from the card in the event of error
• The bit LCT (Last Character to Transmit) allows fast
reconfiguration for receiving the answer 12 ETU after
the start bit of the last transmitted character.
The ISO UART status register can inform which event has
caused an interrupt (buffer full, buffer empty, parity error
detected etc.) in accordance with peripheral interface.
The register is reset when its status is read by the
microcontroller.
The ISO UART configuration register enables the
microcontroller to configure the ISO UART and to choose
between 5 or 3 V cards. Bit UC4 (3 V/5 V) LOW means
5 V card, bit UC4 (3 V/5 V) HIGH means 3 V card; conform
peripheral interface. The selection of 3 or 5 V card has to
be done before activation.
After power-on, all ISO UART registers are reset.
The ISO UART is configured in the reception mode. When
the microcontroller wants to start a session, it sets the bits
UC1 (START SESSION) and UC0 (ISO UART RESET) in
the UART configuration register and then sets bit START
SESSION LOW. When the first start bit on I/O is detected
(sampling rate f_clk/31), the UART sets the bit US2 (first
start bit detected) in the status register which gives an
interrupt on internal port INT0 one clock pulse later.
The convention is recognized on the first character of the
ATR and the UART configures itself in order to exchange
direct data without parity processing with the
microcontroller whatever the convention of the card is.
Bit UC1 (START SESSION) must be reset by software.
At the end of every character, the UART tests the parity
and resets what is necessary for receiving another
character.
If no parity error is detected, the UART sets bit US1 (UART
receive buffer full) in the status register which warns the
microcontroller it has to read the character before the
reception of the next one has been completed. The status
register is reset when read from the controller.
If a parity error has been detected, the UART pulls the I/O
line LOW between 10.5 and 12 ETU. It also sets the
bits US1 (UART receive buffer full) and US3 (parity error
detected during reception of a character) in the status
register which warns the microcontroller that an error has
occurred. The card is supposed to repeat the previous
character.
1998 Mar 20
14