TDA8005A Datasheet, PDF (13/36 Pages) NXP Semiconductors – Low-power 3 V/5 V smart card coupler

Philips Semiconductors
Low-power (3 V/5 V) smart card coupler
Preliminary specification
TDA8005A
USE OF PERIPHERAL INTERFACE
Write operation
1. Select the correct register with R/W, REG0 and REG1
2. Write the word in the Peripheral Shift Register (PSR)
with DATA and STROBE; DATA is shifted on the rising
edge of STROBE; 8 shifts are necessary
3. Give a negative pulse on ENABLE; the data is parallel
loaded in the register on the falling edge of ENABLE.
Read operation
1. Select the correct register with R/W, REG0 and REG1
2. Give a first negative pulse on ENABLE; the word is
parallel loaded in the peripheral shift register on the
rising edge of ENABLE
3. Give a second negative pulse on ENABLE for
configuring the PSR in shift right mode
4. Read the word from PSR with DATA and STROBE;
DATA is shifted on the rising edge of STROBE; 7 shifts
are necessary.
;****************************************
;*READ CHARACTER ARRIVED IN UART RECEIVE*
;*****************REGISTER***************
;****************************************
;
;**THE CHARACTER WILL BE IN THE**
;**ACCUMULATOR**
CLR REG0
CLR REG1
SET R/W
CLR ENABLE
SET ENABLE
CLR ENABLE
SET ENABLE
MOV R2,#8
LOOP
MOV C,DATA
RRC A
CLR STROBE
SET STROBE
DJNZ R2,LOOP
SET DATA
RET
EXAMPLE OF PERIPHERAL INTERFACE
;****************************************
;*CHANGE OF CLOCK CONFIGURATION REGISTER*
;****************************************
;
;**THE NEW CONFIGURATION IS SUPPOSED**
;**TO BE IN THE ACCUMULATOR**
CLR REG0
CLR REG1
CLR R/W
MOV R2,#8
LOOP
RRC A
MOV DATA C
CLR STROBE
SET STROBE
DJNZ R2,LOOP
CLR ENABLE
SET ENABLE
SET DATA
RET
ISO UART
The ISO UART handles all the specific requirements
defined in ISO T = 0 protocol type. It is clocked with the
cards clock, which gives the f_clk/31 sampling rate for start
bit detection (the start bit is detected at the first LOW level
on I/O) and the f_clk/372 frequency for Elementary Time Unit
(ETU) timing (in the reception mode the bit is sampled at
1_{⁄2ETU). It also allows the cards clock frequency changes}
without interfering with the baud rate.
This hardware UART allows operating of the
microcontroller at low frequency, thus lowering EM
radiations and power consumption. It also frees the
microcontroller of fastidious conversions and real time jobs
thereby allowing the control of higher level tasks.
The following occurs in the reception mode (see Fig.6):
• Detection of the inverse or direct convention at the
beginning of Answer To Reset (ATR)
• Automatic convention setting, so the microcontroller
only receives characters in direct convention
• Parity checking and automatic request for character
repetition in case of error (reception is possible at
12 ETU).
1998 Mar 20
13