74HC192 Datasheet, PDF (11/13 Pages) NXP Semiconductors – Presettable synchronous BCD decade up/down counter

Philips Semiconductors
Presettable synchronous BCD decade
up/down counter
AC WAVEFORMS
Product specification
74HC/HCT192
(1) HC : V_M = 50%; V_I = GND to V_CC.
HCT: V_M = 1.3 V; V_I = GND to 3 V.
Fig.7 Waveforms showing the clock (CP_U, CP_D) to output (Q_n) propagation delays, the clock pulse width and
the maximum clock pulse frequency.
(1) HC : V_M = 50%; V_I = GND to V_CC.
HCT: V_M = 1.3 V; V_I = GND to 3 V.
Fig.8 Waveforms showing the clock (CP_U, CP_D) to terminal count output (TC_U, TC_D) propagation delays.
(1) HC : V_M = 50%; V_I = GND to V_CC.
HCT: V_M = 1.3 V; V_I = GND to 3 V.
Fig.9 Waveforms showing the parallel load input (PL) and data (D_n) to Q_n output propagation delays and PL
removal time to clock input (CP_U, CP_D).
December 1990
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