UMA1021M Datasheet, PDF (10/16 Pages) NXP Semiconductors – Low-voltage frequency synthesizer for radio telephones

Philips Semiconductors
Low-voltage frequency synthesizer
for radio telephones
Product specification
UMA1021M
SERIAL BUS TIMING CHARACTERISTICS
V_DD = V_CC = 3 V; T_amb = 25 °C; unless otherwise specified.
SYMBOL
PARAMETER
MIN.
TYP.
MAX.
UNIT
Serial programming clock; CLK
t_r
input rise time
t_f
input fall time
T_cy
clock period
Enable programming; E
t_START
t_END
t_W(min)
t_SU;E
delay to rising clock edge
delay from last falling clock edge
minimum inactive pulse width
enable set-up time to next clock edge
Register serial input data; DATA
t_SU;DAT
t_HD;DAT
input data to clock set-up time
input data to clock hold time
−
10
40
ns
−
10
40
ns
100
−
−
ns
40
−
−
ns
−20
−
−
ns
4000⁽¹⁾ −
−
ns
20
−
−
ns
20
−
−
ns
20
−
−
ns
Note
1. The minimum pulse width (t_W(min)) can be smaller than 4 µs provided all the following conditions are fulfilled:
a) Main divider input frequency f_RF > -t-_W---4---₍-4-_m--7--_i-_n---₎ .
b) Reference divider input frequency f_xtal > _t--W------₍-3-_m----_i-_n---₎ .
handbook, full pagewtSid_Uth_;DAT
CLK
DATA
MSB
E
tSTART
tHD;DAT
Tcy
tf
tr
tEND tSU;E
LSB
ADDRESS
MGD565
tW(min)
1999 Jun 17
Fig.3 Serial bus timing diagram.
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