TDA8785 Datasheet, PDF (10/24 Pages) NXP Semiconductors – 8-bit high-speed analog-to-digital converter with gain and offset controls

Philips Semiconductors
8-bit high-speed analog-to-digital converter
with gain and offset controls
Product specification
TDA8785
SYMBOL
PARAMETER
CONDITIONS
Digital inputs (pins CLKDAC, CLKADC and DA7 to DA0)
V_IL
LOW-level input voltage
V_IH
HIGH-level input voltage
I_IL
LOW-level input current
I_IH
HIGH-level input current
Z_i
input impedance
C_i
input capacitance
V_IL = 0.4 V
V_IH = 2.7 V
f_clk = 10 MHz
f_clk = 10 MHz
ADC output format (pin OF); see Table 2
V_IL
LOW-level input voltage
V_IH
HIGH-level input voltage
V_i(Z)
input voltage in high impedance
state
I_IL
LOW-level input current
I_IH
HIGH-level input current
V_IL = 0.4 V
V_clk = 2.7 V
ADC digital outputs
V_OL
LOW-level output voltage
V_OH
HIGH-level output voltage
I_OL = 2 mA
I_OH = −0.4 mA
ADC and DAC switching; see Fig.4
f_clk(max)
t_CPH
t_CPL
maximum clock frequency
clock pulse width HIGH
clock pulse width LOW
note 2
Analog processing; note 3
INL
integral non-linearity
ramp input (full-scale);
0 to 20 dB gain
DNL
differential non-linearity
ramp input (full-scale);
0 to 20 dB gain
S/N
signal-to-noise ratio
(without harmonics)
f_i = 2 MHz
0 dB gain
10 dB gain
B
bandwidth
20 dB gain
−3 dB
MIN.
0
2.0
−400
−
−
−
0
2.6
−
−370
−
0
2.4
30
12
12
−
−
−
−
−
TYP.
−
−
−
−
4
4.5
−
−
1.20
−130
300
−
−
−
−
−
±0.7
±0.2
47
45
43
100
MAX. UNIT
0.8 V
V_CCD V
−
µA
100 µA
−
kΩ
−
pF
0.2 V
V_CCD V
−
V
−
µA
450 µA
0.6 V
V_CCO V
−
MHz
−
ns
−
ns
±1.8 LSB
±0.7 LSB
−
dB
−
dB
−
dB
−
MHz
1997 Dec 18
10