80C451 Datasheet, PDF (10/22 Pages) NXP Semiconductors – 80C51 8-bit microcontroller family 4K/128 OTP/ROM/ROMless, expanded I/O

Philips Semiconductors
80C51 8-bit microcontroller family
4K/128 OTP/ROM/ROMless, expanded I/O
Product specification
80C451/83C451/87C451
DC ELECTRICAL CHARACTERISTICS¹
T_amb = 0°C to +70°C, V_CC = 5V ±10%, V_SS = 0V (87C451, 83C451, 80C451)
TEST
SYMBOL
PARAMETER
CONDITIONS
LIMITS
MIN
TYPICAL¹
MAX
UNIT
V_IL
V_IL1
V_IH
V_IH1
V_OL
V_OL1
V_OH
V_OH1
I_IL
I_TL
I_LI
I_CC
Input low voltage; except EA
–0.5
0.2V_CC–0.1
V
Input low voltage to EA
Input high voltage; except XTAL1, RST
0
0.2V_CC+0.9
0.2V_CC–0.3
V
V_CC+0.5
V
Input high voltage; XTAL1, RST
Output low voltage; ports 1, 2, 3, 4, 5, 6
Output low voltage; port 0, ALE, PSEN
Output high voltage; ports 1, 2, 3, 4, 5, 6
Output high voltage (port 0 in external bus mode, ALE,
PSEN)³
I_OL = 1.6mA²
I_OL = 3.2mA²
I_OH = –60µA,
I_OH = –25µA
I_OH = –10µA
I_OH = –800µA,
I_OH = –300µA
I_OH = –80µA
0.7V_CC
2.4
0.75V_CC
0.9V_CC
2.4
0.75V_CC
0.9V_CC
V_CC+0.5
V
0.45
V
0.45
V
V
V
V
V
V
V
Logical 0 input current,; ports 1, 2, 3, 4, 5, 6
Logical 1-to-0 transition current; ports 1, 2, 3, 4, 5, 6
V_IN = 0.45V
See note 4
–50
µA
–650
µA
Input leakage current; port 0
V_IN = V_IL or V_IH
+10
µA
Power supply current:
Active mode @ 12MHz⁵
Idle mode @ 12MHz⁵
Power down mode
See note 6
11.5
25
mA
1.3
4
mA
3
50
µA
R_RST
Internal reset pull-down resistor
50
300
kΩ
C_IO
Pin capacitance⁷
10
pF
NOTES:
1. Typical ratings are based on a limited number of samples taken from early manufacturing lots and are not guaranteed. The values listed are
at room temperature, 5V.
2. Capacitive loading on ports 0 and 2 may cause spurious noise to be superimposed on the V_OLs of ALE and ports 1 and 3. The noise is due
to external bus capacitance discharging into the port 0 and port 2 pins when these pins make 1-to-0 transitions during bus operations. In the
worst cases (capacitive loading > 100pF), the noise pulse on the ALE pin may exceed 0.8V. In such cases, it may be desirable to qualify
ALE with a Schmitt Trigger, or use an address latch with a Schmitt Trigger STROBE input.
3. Capacitive loading on ports 0 and 2 may cause the V_OH on ALE and PSEN to momentarily fall below the 0.9V_CC specification when the
address bits are stabilizing.
4. Pins of ports 1, 2 and 3 source a transition current when they are being externally driven from 1 to 0. The transition current reaches its
maximum value when V_IN is approximately 2V.
5. I_CCMAX at other frequencies is given by:
Active mode: I_CCMAX = 0.94 X FREQ + 13.71
Idle mode: I_CCMAX = 0.14 X FREQ +2.31
where FREQ is the external oscillator frequency in MHz. I_CCMAX is given in mA. See Figure 13.
6. See Figures 14 through 17 for I_CC test conditions.
7. C_IO applies to ports 1 through 6, AFLAG, BFLAG, XTAL1, XTAL2.
1998 May 01
10