ISP1562 Datasheet, PDF (1/98 Pages) NXP Semiconductors – Hi-Speed Universal Serial Bus PCI Host Controller

ISP1562
Hi-Speed Universal Serial Bus PCI Host Controller
Rev. 01 — 14 July 2005
Product data sheet
1. General description
The ISP1562 is a Peripheral Component Interconnect (PCI)-based, single-chip Universal
Serial Bus (USB) Host Controller. It integrates two Original USB Open Host Controller
Interface (OHCI) cores, one Hi-Speed USB Enhanced Host Controller Interface (EHCI)
core, and two transceivers that are compliant with Hi-Speed USB and Original USB. The
functional parts of the ISP1562 are fully compliant with Universal Serial Bus Specification
Rev. 2.0, Open Host Controller Interface Specification for USB Rev. 1.0a, Enhanced Host
Controller Interface Specification for Universal Serial Bus Rev. 1.0, PCI Local Bus
Specification Rev. 2.2, and PCI Bus Power Management Interface Specification Rev. 1.1.
The integrated high performance USB transceivers allow the ISP1562 to handle all
Hi-Speed USB transfer speed modes: high-speed (480 Mbit/s), full-speed (12 Mbit/s) and
low-speed (1.5 Mbit/s). The ISP1562 provides two downstream ports, allowing
simultaneous connection of USB devices at different speeds.
The ISP1562 is fully compatible with various operating system drivers, such as Microsoft
Windows standard OHCI and EHCI drivers that are present in Windows XP,
Windows 2000 and Red Hat Linux.
The ISP1562 directly interfaces to any 32-bit, 33 MHz PCI bus. Its PCI pins can source
3.3 V. The PCI interface fully complies with PCI Local Bus Specification Rev. 2.2.
The ISP1562 is ideally suited for use in Hi-Speed USB mobile applications and embedded
solutions. The ISP1562 uses a 12 MHz crystal.
2. Features
s Complies with Universal Serial Bus Specification Rev. 2.0
s Supports data transfer at high-speed (480 Mbit/s), full-speed (12 Mbit/s) and
low-speed (1.5 Mbit/s)
s Two Original USB OHCI cores comply with Open Host Controller Interface
Specification for USB Rev. 1.0a
s One Hi-Speed USB EHCI core complies with Enhanced Host Controller Interface
Specification for Universal Serial Bus Rev. 1.0
s Supports PCI 32-bit, 33 MHz interface compliant with PCI Local Bus Specification
Rev. 2.2, with support for D3_cold standby and wake-up modes; all I/O pins are 3.3 V
standard
s Compliant with PCI Bus Power Management Interface Specification Rev. 1.1 for all
hosts (EHCI and OHCI), and supports all power states: D0, D1, D2, D3_hot and D3_cold