PI3VDP411LST Datasheet, PDF (6/11 Pages) Pericom Semiconductor Corporation – Digital Video Level Shifter for dual mode DP signals w/ inverting buffer for HPD signal

PI3VDP411LST
Digital Video Level Shifter for dual mode DP
signals w/ inverting buffer for HPD signal
Pin Name
OC_3⁽¹⁾
OC_0⁽¹⁾
OC_1⁽¹⁾
EQ_0⁽¹⁾
EQ_1⁽¹⁾
Type
Analog connection to external
component or supply
Output and Input jitter elimina-
tion control
Description
Acceptable connections to OC_3 pin are: short to
3.3V or to GND; NC.
Control pins are to enable Jitter elimination features.
For normal operation these pins are tied GND or to
VCC3V. Please see the truth tables for more informa-
tion.
Notes:
1) internal 100Kohm pull-up
Truth Table 1
OC_3 OC_2
0
0
0
0
0
0
0
0
0
1
0
1
0
1
0
1
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
OC_1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
OC_0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Vswing
(mV)
500
600
750
1000
500
500
500
500
400
400
400
400
1000
1000
1000
1000
Pre/De-
emphasis
0
0
0
0
0
1.5dB
3.5dB
6dB
0
3.5dB
6dB
9dB
0
-3.5dB
-6dB
-9dB
Truth Table 2
EQ_0
EQ_1
0
0
0
1
1
0
1
1
Equalization
(dB)
3
7.2
10
12
07-0191
6
PS8906A
08/28/07