PT7C4339 Datasheet, PDF (10/22 Pages) Pericom Semiconductor Corporation – Real-time Clock Module

PT7C4339/4339C
Real-time Clock Module
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5) Interrupt related bits
INTCN
Interrupt Output pin select bit. This bit controls the relationship between the two alarms and the interrupt output pins.
INTCN Data
Description
Read/write
A match between the timekeeping registers and the alarm 1 or alarm 2 registers activate the SQW/INT
1
pin (provided that the alarm is enabled).
0 In this configuration, a square wave is output on the SQW/INT pin.
Default
A1IE
Alarm 1 Interrupt Enable.
A1IE
Data
0
Read/write
1
Description
The A1F bit does not initiate the SQW/INT signal.
Permits the alarm 1 flag (A1F) bit in the status register to assert SQW/INT.
Default
A1F
Alarm 1 Flag.
A1F
Data
Read / Write 0
Read
1
Description
The time does not match the alarm 1 registers.
Default
A logic 1 in the Alarm 1 Flag bit indicates that the time matched the alarm 1 registers. If the A1IE bit is
a logic 1 and the INTCN bit is set to a logic 1, the SQW/INT pin is also asserted. A1F is cleared when
written to logic 0. This bit can only be written to logic 0. Attempting to write to logic 1 leaves the value
unchanged.
A2IE
Alarm 2 Interrupt Enable.
A2IE
Data
Description
0 The A2F bit does not initiate an interrupt signal.
Default
Read/write
1 Permits the alarm 2 flag (A2F) bit in the status register to assert SQW/INT (when INTCN = 1).
A2F
Alarm 2 Flag.
A1F
Read / Write
Data
Description
0 The time does not match the alarm 2 registers.
Default
Read
A logic 1 in the Alarm 2 Flag bit indicates that the time matched the alarm 2 registers. If the A2IE bit
1 ^{is a logic 1 and the INTCN bit is set to a logic 1, the SQW/INT pin is also asserted. A2F is cleared}
when written to logic 0. This bit can only be written to logic 0. Attempting to write to logic 1 leaves
the value unchanged.
2015-08-0008
PT0508-1 08/24/15
10