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MN103SK0 Datasheet, PDF (2/11 Pages) Panasonic Semiconductor – 32-bit Single-chip Microcontroller | |||
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MN103SK0/K1 Series
ï¢ Features
ï CPU core
MN103S core
4 GB of linear address space (for instructions / data)
LOAD/STORE architecture with 5-stage pipeline
46 basic instructions + 23 extension instructions
6 addressing modes
Instruction set of 1 byte in word length
Extension arithmetic unit incorporated (high-speed multiply, multiply and accumulate and saturation operation instructions)
Machine cycle: 16.7 ns (oscillation frequency: 10 MHz, 6 multiplying)
Operation mode: NORMAL mode, SLEEP mode, HALT mode, STOP mode
ï Oscillation circuit
External oscillation (crystal/ ceramic), Internal oscillation (10 MHz)
ï ROM correction
Maximum 4 parts in a program
ï Internal memory
ROM 256 Kbytes
RAM 8 Kbytes
ï Interrupts
Internal interrupts: MN103SFK0K: 54 interrupts / MN103SFK1K: 54 interrupts
Watchdog timer overï¬ow interrupts
System error interrupts
Fail safe function interrupts
<Timer Interrupts>
Timer 0 underï¬ow interrupts
Timer 1 underï¬ow interrupts
Timer 2 underï¬ow interrupts
Timer 3 underï¬ow interrupts
Timer 4 underï¬ow interrupts
Timer 5 underï¬ow interrupts
Timer 6 underï¬ow interrupts
Timer 7 underï¬ow interrupts
Timer 8 underï¬ow interrupts
Timer 9 underï¬ow interrupts
Timer 10 underï¬ow interrupts
Timer 11 underï¬ow interrupts
Timer 16 overï¬ow/underï¬ow interrupt
Timer 16 compare/capture A interrupt
Timer 16 compare/capture B interrupt
Timer 17 overï¬ow/underï¬ow interrupt
Timer 17 compare/capture A interrupt
Timer 17 compare/capture B interrupt
Timer 18 overï¬ow/underï¬ow interrupt
Timer 18 compare/capture A interrupt
Timer 18 compare/capture B interrupt
Timer 19 overï¬ow/underï¬ow interrupt
Timer 19 compare/capture A interrupt
Timer 19 compare/capture B interrupt
Timer 20 overï¬ow/underï¬ow interrupt
Timer 20 compare/capture A interrupt
Timer 20 compare/capture B interrupt
2
Ver. AEM
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