OXCF950 Datasheet, PDF (13/66 Pages) Oxford Semiconductor – Single full-duplex asynchronous channel 128-byte deep transmitter / receiver FIFO

OXFORD SEMICONDUCTOR LTD.
OXCF950 rev B DATA SHEET V 1.0
5 PCMCIA / CF TARGET CONTROLLER
5.1 Operation
Note: See section 0 for timing waveforms.
The OXCF950 responds to a number of different
CF/PCMCIA accesses (detailed below). Section 0 contains
timing diagrams and information for each of these types of
access.
defined thus simplifying access to the function. As
reads and writes are immediate, there is no
requirement to hold the WAIT# signal in its active
state, thus providing maximum speed access to IO
space.
5.2 Configuration Space (Card Information
Structure)
• Direct Common Memory read/writes: These are
required in Local Bus mode only to allow indirect
5.2.1 Local Bus Mode Space Map
access to attribute memory. This type of access is
permitted before and after configuration to allow the
reading of the CIS information, but is only supported
by the PCMCIA specification. Only 8 bit data, even
0xFF
Direct
Indirect
byte accesses are performed to this memory as it is
only used for access to the indirect attribute memory.
If the host attempts to access an invalid address, the
value of 0xFF (null) is returned.
Common NOT VALID
NOT VALID
• Direct Attribute Memory read/writes: Access to direct
attribute memory is required in both CF and PCMCIA
specifications. This memory space contains all the
configuration information for the device, as well as the
configuration registers. In CF systems, where only
direct access is permitted, th is space is the only
memory space that is accessed by the host system. If
the host attempts to access common memory in this
0x10
0x0F
0x00
Indirect Access
Register
mode, the device will return 0xFF telling the host that
there is no valid data in this space. In Local Bus
Mode, the direct attribute memory informs the host
that indirect access is enabled allowing the host to
0xFF
perform indirect access to attribute memory, via
common memory. Valid data is 8 bits wide and on
even bytes only, for direct attribute memory (as
defined in the PCMCIA 7.1 standard)
Attribute ^{NOT VALID}
• Indirect Attribute Memory read/writes (Local Bus mode ^{(Valid at even}
only): Access to indirect attribute memory is ^{locations only)}
performed through direct common memory. This
allows the device to provide full functionality with only
0x10
0x0F
4 address pins. This access is performed to read the
CIS and also read/write to configuration registers.
Valid data is 8 bit wide and on even bytes only, for
indirect attribute memory (as defined in the PCMCIA
0x00
Hard Coded CIS to
link to indirect space
Function
Configuration
Registers
Main CIS either:
a) Normal Default
b) Bluetooth Default
c) Custom CIS
(downloaded from
EEPROM)
7.1 standard).
0xFF
0x80
0x7F
0x00
0xFF
0xF8
0xF6
0x00
• IO read/writes: IO accesses are performed to access
the UART, local bus (Local Bus mode) and local
configuration registers. Data width is restricted to 8
bits, as required by the standard UART function. As
the device CIS information configures the card as a
single function device, no base addresses need to be
Figure 4: Local Bus mode memory space map
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