LC75879PT_13 Datasheet, PDF (9/35 Pages) ON Semiconductor – LCD Display Driver

(2) When CL is stopped at the high level
LC75879PT
CE
CL
DI 1 0 1 0 0 0 1 0 D1 D2
B0 B1 B2 B3 A0 A1 A2 A3
CCB address
8 bits
D60 D61 D62 D63 D64 D65 D66 D67 D68 0 0 0 PS10 PS11 PS2 PS3 PS4 EXF DN OC P0 P1 P2 P3 DT SC BU 0 0
Display data
68bits
Control data
18 bits
DD
2bits
1 0 1 0 0 0 1 0 D69 D70
B0 B1 B2 B3 A0 A1 A2 A3
CCB address
8 bits
D128 D129 D130 D131 D132 D133 D134 D135 D136 0 0 0 0 0 0 0 0 PF0 PF1 PF2 PF3 FC0 FC1 FC2 CT0 CT1 CT2 0 1
Display data
68 bits
Control data
18 bits
DD
2bits
1 0 1 0 0 0 1 0 D137 D138 D196 D197 D198 D199 D200 0 0 0 0 W10 W11 W12 W13 W14 W15 W20 W21 W22 W23 W24 W25 W30 W31 W32 W33 W34 W35 1 0
B0 B1 B2 B3 A0 A1 A2 A3
CCB address
8 bits
Display data
64 bits
Control data
22 bits
DD
2bits
1 0 1 0 0 0 1 0 D201 D202
B0 B1 B2 B3 A0 A1 A2 A3
CCB address
8 bits
D260 D261 D262 D263 D264 D265 D266 D267 D268 D269 D270 D271 D272 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1
Display data
72 bits
Fixed data
14 bits
DD
2bits
Note: DD is the direction data
• CCB address ……………….. “45H”
• D1 to D272 ………………… Display data
• PS10, PS11, PS2 to PS4 …. .. General-purpose output port (P1 to P4) function setting control data
• EXF ………………………… External clock operating frequency setting control data
• DN …………………………. S68 pin and S69/OSCI pin state setting control data
• OC …………………………. Internal oscillator operating mode/external clock operating mode switching control data
• P0 to P3 …………………….. Segment output port/general-purpose output port switching control data
• DT ………………………….. 1/4-duty 1/3-bias drive or 1/3-duty 1/3-bias drive switching control data
• SC ………………………..… Segment on/off control data
• BU ………………………..… Normal mode/power-saving mode control data
• PF0 to PF3 ………………… PWM output waveform frame frequency setting control data
• FC0 to FC2 ………………… Common/segment output waveform frame frequency setting control data
• CT0 to CT2 ………………… Display contrast setting control data
• W10 to W15, W20 to W25, ... PWM data of the PWM output
W30 to W35
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