AMIS-42700 Datasheet, PDF (9/14 Pages) AMI SEMICONDUCTOR – Dual High-Speed CAN Transceiver

AMIS−42700
Table 6. DC and Timing Characteristics (V_CC = 4.75 to 5.25 V; T_junc = −40 to +150°C; R_LT = 60 W unless specified otherwise.)
Symbol
Parameter
Conditions
Min.
Typ.
Max. Unit
BUS LINES (pins CANH1/2 and CANL1/2)
V_i(dif)(th)
Differential receiver threshold voltage
−5 V < V_CANLx < +12 V;
−5 V < V_CANHx < +12 V;
see Figure 6
0.5
0.7
0.9
V
V_{ihcm(dif) (th)}
Differential receiver threshold voltage
for high common−mode
−35 V < V_CANLx < +35 V;
−35 V < V_CANHx < +35 V;
see Figure 6
0.3
0.7
1.05
V
V_{i(dif) (hys)}
Differential receiver input voltage
hysteresis
−35V < V_CANL < +35 V;
−35 V < V_CANH < +35 V;
see Figure 6
50
70
100
mV
R_i(cm)
(CANHx)
R_i(cm)
(CANLx)
R_i(cm)(m)
Common−mode input resistance at
pin CANH1/2
Common−mode input resistance at
pin CANL1/2
Matching between pin CANH1/2 and
pin CANL1/2 common−mode input
resistance
V_CANHx = V_CANLx
15
26
37
KW
15
26
37
KW
−3
0
+3
%
R_i(dif)
C_i(CANHx)
C_i(CANLx)
C_i(dif)
I_LI(CANHx)
I_LI(CANLx)
V_CM−peak
Differential input resistance
Input capacitance at pin CANH1/2
Input capacitance at pin CANL1/2
Differential input capacitance
Input leakage current at pin CANH1/2
Input leakage current at pin CANL1/2
Common−mode peak during transition
from dom → rec or rec → dom
V_Tx0 = V_CC; not tested
V_Tx0 = V_CC; not tested
V_Tx0 = V_CC; not tested
V_CC < PORL_VCC;
−5.25 V < V_CANHx < 5.25 V
V_CC < PORL_VCC;
−5.25 V < V_CANLx < 5.25 V
see Figure 10
25
−350
−350
−1000
50
75
KW
7.5
20
pF
7.5
20
pF
3.75
10
pF
170
350
mA
170
350
mA
1000
mV
V_CM−step
Difference in common−mode between
dominant and recessive state
see Figure 10
−250
250
mV
V_CANL2VBAT Detection level for CANL1/2 short to
VBAT
7
9.5
V
THERMAL SHUTDOWN
T_j(sd)
Shutdown junction temperature
TIMING CHARACTERISTICS (see Figures 7 and 8)
150
°C
t_{d(Tx−BUSon)}
t_{d(Tx−BUSoff)}
t_{d(BUSon−RX)}
t_{d(BUSoff−RX)}
t_d(ENxB)
Delay Tx0/Text to bus active
Delay Tx0/Text to bus inactive
Delay bus active to Rx0/Rint
Delay bus inactive to Rx0/Rint
Delay from EN1B to bus
active/inactive
40
85
120
ns
30
60
115
ns
25
55
115
ns
65
100
145
ns
100
200
ns
t_{d(Tx−Rx)}
Delay from Tx0 to Rx0/Rint and from
15 pF on the digital output
4
10
35
ns
Text to Rx0 (direct logical path)
t_d(CAN2VBAT) Reaction time of the CANL−to−VBAT
Short occurring
1
short detector
Short disappearing
1
4
ms
5.5
ms
t_dom
Time out counter interval
250
450
750
ms
t_d(FBS)
Delay for feedback
suppression release
5+
t_{d(BUSon−RX)}
330
ns
8. Guaranteed by design for VBAT = 36 V; measured in production for VBAT = 7 V to avoid short−2−VBAT detection
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