MC74HC589A_05 Datasheet, PDF (7/14 Pages) ON Semiconductor – 8-Bit Serial or Parallel-Input/Serial-Output Shift Register with 3-State Output High−Performance Silicon−Gate CMOS

MC74HC589A
FUNCTION TABLE
Inputs
Operation
Output Serial Shift/ Latch
Enable Parallel Load Clock
Force Output into High
H
X
X
Impedance State
Load Parallel Data into Data L
H
Latch
Transfer Latch Contents to
L
Shift Register
L
L, H,
Contents of Input Latch and
L
Shift Register are Unchanged
H
L, H,
Load Parallel Data into Data L
L
Latch and Shift Register
Shift Serial Data into Shift
L
H
X
Register
Load Parallel Data in Data
L
H
Latch and Shift Serial Data
into Shift Register
LR =
SR =
a−h =
D=
latch register contents
shift register contents
data at parallel data inputs A−H
data (L, H) at serial data input S_A
Shift
Clock
X
L, H,
X
L, H,
X
Serial
Input
S_A
X
Parallel
Inputs
A−H
X
Resulting Function
Data
Latch
Contents
Shift
Register
Contents
Output
Q_H
X
X
Z
X
a−h
a−h
U
U
X
X
X
X
U
LR_N → SR_N
LR_H
U
U
U
X
a−h
a−h
a−h
h
D
X
D
a−h
*
SR_A = D, SR_G → SR_H
SR_N → SR_N+1
a−h
SR_A = D, SR_G → SR_H
SR_N → SR_N+1
U = remains unchanged
X = don’t care
Z = high impedance
* = depends on Latch Clock input
Switching Waveforms
t_r
t_f
LATCH
CLOCK
90%
50%
10%
t_w
t_PLH
t_PHL
Q_H
90%
50%
10%
t_TLH
t_THL
V_CC
GND
SHIFT
CLOCK
t_w
50%
1/f_max
Q_H 50%
t_PLH
t_PHL
V_CC
GND
Figure 3. (Serial Shift/Parallel Load = L)
Figure 4. (Serial Shift/Parallel Load = H)
OUTPUT
ENABLE
Q_H
Q_H
50%
t_PZL t_PLZ
50%
t_PZH t_PHZ
50%
Figure 5.
10%
90%
V_CC
GND
HIGH
IMPEDANCE
V_OL
V_OH
HIGH
IMPEDANCE
SERIAL SHIFT/
PARALLEL LOAD
t_w
50%
t_PLH
Q_H
50%
Figure 6.
50%
t_PHL
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V_CC
GND