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MC74AC74_15 Datasheet, PDF (7/10 Pages) ON Semiconductor – Dual D-Type Positive Edge-Triggered Flip-Flop
MC74AC74, MC74ACT74
AC OPERATING REQUIREMENTS
Symbol
Parameter
Set-up Time, HIGH or LOW
ts
Dn to CPn
Hold Time, HIGH or LOW
th
Dn to CPn
tw
CPn or CDn or SDn
Pulse Width
Recovery TIme
trec
CDn or SDn to CP
*Voltage Range 5.0 V is 5.0 V ±0.5 V.
CAPACITANCE
Symbol
Parameter
CIN
Input Capacitance
CPD
Power Dissipation Capacitance
74ACT
74ACT
VCC*
(V)
TA = +25°C
CL = 50 pF
TA = −40°C
to +85°C
CL = 50 pF
Unit
Fig.
No.
Typ
Guaranteed Minimum
5.0 1.0
3.0
3.5
ns
3−9
5.0 −0.5
1.0
1.0
ns
3−9
5.0 3.0
5.0
6.0
ns
3−6
5.0 −2.5
0
0
ns
3−9
Value
Typ
Unit
4.5
pF
35
pF
Test Conditions
VCC = 5.0 V
VCC = 5.0 V
ORDERING INFORMATION
Device
Package
Shipping†
MC74AC74DG
SOIC−14
(Pb−Free)
55 Units/Rail
MC74AC74DR2G
SOIC−14
(Pb−Free)
2500/Tape & Reel
MC74AC74DTR2G
TSSOP−14
(Pb−Free)
2500/Tape & Reel
MC74ACT74DG
SOIC−14
(Pb−Free)
55 Units/Rail
MC74ACT74DR2G
SOIC−14
(Pb−Free)
2500/Tape & Reel
MC74ACT74DTR2G
TSSOP−14
(Pb−Free)
2500/Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
www.onsemi.com
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