MC74AC74_15 Datasheet, PDF (6/10 Pages) ON Semiconductor – Dual D-Type Positive Edge-Triggered Flip-Flop

MC74AC74, MC74ACT74
DC CHARACTERISTICS
Symbol
Parameter
V_IH
Minimum High Level
Input Voltage
V_IL
Maximum Low Level
Input Voltage
V_OH
Minimum High Level
Output Voltage
74ACT
74ACT
V_CC
(V)
T_A = +25°C
T_A =
−40°C to
+85°C
Typ Guaranteed Limits
4.5
1.5 2.0
2.0
5.5
1.5 2.0
2.0
4.5
1.5 0.8
0.8
5.5
1.5 0.8
0.8
4.5 4.49 4.4
4.4
5.5 5.49 5.4
5.4
V_OL
Maximum Low Level
Output Voltage
4.5
− 3.86
3.76
5.5
− 4.86
4.76
4.5 0.001 0.1
0.1
5.5 0.001 0.1
0.1
4.5
− 0.36
5.5
− 0.36
I_IN
Maximum Input
Leakage Current
5.5
− ±0.1
DI_CCT
I_OLD
I_OHD
Additional Max. I_CC/Input
†Minimum Dynamic
Output Current
5.5
0.6
−
5.5
−
−
5.5
−
−
I_CC
Maximum Quiescent
Supply Current
5.5
−
4.0
*All outputs loaded; thresholds on input associated with output under test.
†Maximum test duration 2.0 ms, one output loaded at a time.
0.44
0.44
±1.0
1.5
75
−75
40
Unit
Conditions
V
V_OUT = 0.1 V
or V_CC − 0.1 V
V
V_OUT = 0.1 V
or V_CC − 0.1 V
V
I_OUT = −50 mA
*V_IN = V_IL or V_IH
V
−24 mA
I_OH
−24 mA
V
I_OUT = 50 mA
*V_IN = V_IL or V_IH
V
I_OL
24 mA
24 mA
mA
V_I = V_CC, GND
mA
V_I = V_CC − 2.1 V
mA
V_OLD = 1.65 V Max
mA
V_OHD = 3.85 V Min
mA
V_IN = V_CC or GND
AC CHARACTERISTICS
Symbol
Parameter
f_max
Maximum Clock
Frequency
t_PLH
Propagation Delay
C_Dn or S_Dn to Q_n or Q_n
t_PHL
Propagation Delay
C_Dn or S_Dn to Q_n or Q_n
t_PLH
Propagation Delay
C_Pn to Q_n or Q_n
t_PHL
Propagation Delay
C_Pn to Q_n or Q_n
*Voltage Range 5.0 V is 5.0 V ±0.5 V.
74ACT
74ACT
V_CC*
(V)
T_A = +25°C
C_L = 50 pF
T_A = −40°C
to +85°C
C_L = 50 pF
Unit
Fig.
No.
Min Typ Max Min Max
5.0 145 210
− 125
−
MHz 3−3
5.0 3.0 5.5 9.5 2.5 10.5 ns
3−6
5.0 3.0 6.0 10.0 3.0 11.5 ns
3−6
5.0 4.0 7.5 11.0 4.0 13.0 ns
3−6
5.0 3.5 6.0 10.0 3.0 11.5 ns
3−6
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