MC74AC74_15 Datasheet, PDF (2/10 Pages) ON Semiconductor – Dual D-Type Positive Edge-Triggered Flip-Flop

MC74AC74, MC74ACT74
TRUTH TABLE (Each Half)
Inputs
Outputs
S_D
C_D
CP
D
Q
Q
L
H
X
X
H
L
H
L
X
X
L
H
L
L
X
X
H
H
H
H
H
H
L
H
H
L
L
H
H
H
L
X
Q₀
Q₀
NOTE:
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial;
= LOW-to-HIGH Clock Transition
Q₀(Q₀) = Previous Q(Q) before LOW-to-HIGH
Transition of Clock
Q₁
Q₁
S_D1
C_D1
D₁ CP₁
Q₂
S_D2
D₂ CP₂
Q₂
CD₂
Figure 2. Logic Symbol
S_D
D
Q
CP
Q
C_D
NOTE:
This diagram is provided only for the understanding of
logic operations and should not be used to estimate
propagation delays.
Figure 3. Logic Diagram
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