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SCYW99143 Datasheet, PDF (6/35 Pages) ON Semiconductor – Universal High Voltage Control Block
CONFIDENTIAL AND PROPRIETARY
NOT FOR PUBLIC RELEASE
SCYW99143
Table 3. ELECTRICAL CHARACTERISTICS
(For typical values TJ = 25°C, for min/max values TJ = −40°C to +125°C, Max TJ = 150°C, Vcc = 12 V unless otherwise noted)
Symbol
Rating
Pad Option Min
Typ
Max
X2 DISCHARGE CIRCUITRY
Vth_X2
X2 timer disable switch threshold voltage
1
−
1
1.5
2
Vth_X2_hyst
Hysteresis on the X2 pin (Note 6)
1
−
100
−
V_X2_clamp
X2 input clamp voltage (I_X2_leak = 1 mA)
1
−
−
4
−
X2_timer
X2 timer duration (Note 3)
1
X1
70
−
140
X2
35
−
65
X3
17
−
33
I_X2_leak
X2 input leakage current (V_X2 = 2.5 V)
1
−
−
−
0.3
I_X2_dis
Maximum discharge switch current (VCC = 10 V)
10
−
6
10
13
I_VCC_dis
VCC cap discharge switch resistance (VCC = 10 V)
1
−
6
10
13
REMOTE INPUT ACTIVE ON
V_REM_on
Remote pin voltage below which is the off−mode
deactivated (V_REM going down) (Vcc = 0 V)
2
−
1
1.5
2
V_REM_off
Remote pin voltage above which is the off−mode
activated (V_REM going up) (Note 3)
2
VR1
7.2
VR2
5.4
8
8.8
6
6.6
REM_timer
Remote timer duration (Note 3)
2
RT1
140
−
260
RT2
70
−
140
RT3
35
−
65
RT4
17
−
33
R_SW_REM
Internal remote pull down switch resistance
(V_REM = 8 V)
2
−
1000
−
3000
I_REM_leak
Remote input leakage current (V_REM = 9 V, Note 6)
2
−
−
0.02
1
REMOTE INPUT ACTIVE OFF
V_REM_on
Remote pin voltage above which is the off−mode
deactivated (V_REM going up) (Vcc = 0 V)
2
−
1.5
2
2.5
V_REM_off
Remote pin voltage below which is the off−mode
activated (V_REM going down) (Note 3)
2
VR3 0.18
0.2
0.22
VR4 0.27
0.3
0.33
VR5 0.36
0.4
0.44
I_REM_leak
Remote input leakage current (V_REM = 5 V, Note 6)
2
−
−
0.02
1
I_REM_bias
Pull−up bias current which biased
REM pin during off−mode
2
−
−
2.4
5
INTERNAL COMMUNICATION FOR CO−PACKAGE OPTION
Latch_input_on
Voltage level to start Latch−off mode (Note 4)
7
−
1.53
1.8
2.07
VCC_stop_on
Voltage level for detect that VCC is higher than
secondary controller’s VCC(on) (Note 4)
4
−
Pull_up_current Pull−up current when VCC_stop_on or Latch_input_on 4, 7
−
signals are connected to open drain switch
1.53
1.8
2.07
3
4
6
Pull_down_current
Pull−down current when VCC_stop_on or
4, 7
−
2
4
6
Latch_input_on signals are connected to logic signal
R_BO_buff
Internal series resistance on BO_buff (Note 6)
5
−
−
10
−
3. Possible modification by metal option.
4. If this signal is not connected, the function is not activated.
5. Minimum load impedance connected to BO_buff pin is 1 MW parallel with 1 nF.
6. Guaranteed by design.
Unit
V
mV
V
ms
mA
mA
mA
V
V
ms
W
mA
V
V
mA
mA
V
V
mA
mA
kW
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