SCYW99143 Datasheet, PDF (20/35 Pages) ON Semiconductor – Universal High Voltage Control Block

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NOT FOR PUBLIC RELEASE
SCYW99143
Figure 44. Internal Latch Signal Communication
Bonding Diagram
The bonding diagram of SCYW99143 can be seen in
Figure 45. Pads 1, 2, 3, 5 and 7 can be swapped each other
(using different metal masks options) to allow co−package
with many SMSP controllers with different pinout. Disable
switch output could be connected only on pads 3 and 4. Pads
6, 8, and 10, are fixed and cannot be swapped!
Figure 45. Bonding Diagram for Co−package Option
TSD Protection
The SCYW99143 includes a temperature shutdown
protection. When the temperature rises above the high
threshold during stable operation − i.e. start−up sequence is
ended and Vcc is between Vcc_on and Vcc_off levels, the
controller immediately actives disable switch to stop slave
controller. After the temperature falls back below the lower
threshold, the Vcc capacitor is fully discharged by Vcc
discharge switch to restart both − SCYW99143 and slave
controllers.
The TSD protection can be activated at some other cases
(charging Vcc capacitor − start−up sequence and
discharging X2 or Vcc capacitors). The TSD protection only
interrupts current operating sequence – i.e. the operation
sequence continue after the temperature falls back below the
low threshold. The SCYW99143 is not reset by TSD
activation in these cases.
Controller Operation Sequencing
Below paragraphs describe controller operation
sequencing under several typical cases for Active ON and
Active Off version that can occur in the application as well
as transitions between them. Refer also to the detail status
diagrams for the off−mode versions (Figure 56 and
Figure 57).
Active ON Version
1. Application start, remote off/on then AC line off –
Figure 46:
Application has been plugged into the mains at point A.
The HV pin receives rectified AC line voltage and the X2
sense pin charges up via external charge pump sensing
circuitry. As the high voltage is present on the HV pin the
startup current source is activated to charge Vcc capacitor to
VCC_bias. The BO block bias is enabled at this point (point
B). The Vcc_bias is maintained until the controller receives
BO−OK information from the BO block. When line voltage
is high enough to enable application operation the startup
current source continues to ramp up the Vcc voltage (point
C) up to Vcc_on threshold (point D) where PWM block
operation is enabled (PWM_ON signal). The remote timer
and internal remote pin pull down switch are activated in the
same time (point E) to mask the external remote pin
information and thus assure the application start even if the
remote pin bias remains from previous operation. The
remote opto−coupler is then activated by secondary side
controller to keep converter standard operation under any
load conditions (e.g. standard PWM operation, frequency
foldback or skip mode).
The remote opto−coupler has been turned−off by the
secondary controller at point F to activate the off−mode
operation. The voltage on remote pin thus grows above
V_REM_off threshold. Controller stops PWM operation
immediately by pulling down the FB pin via internal switch.
The Vcc capacitor is then internally discharged to 5 V and
all blocks are disabled to reduce IC consumption to
minimum needed level. The Vcc pin remains unbiased
during whole off−mode operation. The X2 discharge and
remote internal blocks remain biased by the HV leakage
current Istart_off (HV current source is OFF) − consuming
minimum power but still keeping them operated.
The remote opto−coupler has been turned−on by the
secondary controller at point G to activate normal operation
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