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SA571 Datasheet, PDF (6/11 Pages) NXP Semiconductors – Compandor
SA571
Figure 6 shows how the circuit is hooked up to realize an
expandor. The input signal, VIN, is applied to the inputs of
both the rectifier and the DG cell. When the input signal
drops by 6.0 dB, the gain control current will drop by a factor
of 2, and so the gain will drop 6.0 dB. The output level at
VOUT will thus drop 12 dB, giving us the desired 2−to−1
expansion.
R3
*CIN1
R2
DG
VIN
R4
*CIN2 R1
−
+
VOUT
VREF
*CRECT
NOTE:
ǒ Ǔ GAIN +
2 R3 VIN (avg) 2
R1 R2 IB
IB = 140mA
*EXTERNAL COMPONENTS
Figure 6. Basic Expander
Figure 7 shows the hook−up for a compressor. This is
essentially an expandor placed in the feedback loop of the op
amp. The DG cell is setup to provide AC feedback only, so
a separate DC feedback loop is provided by the two RDC and
CDC. The values of RDC will determine the DC bias at the
output of the op amp. The output will bias to:
ǒ Ǔ VOUT DC +
1
)
RDC1
)
R4
RDC2
VREF
ǒ Ǔ VOUT DC +
1 ) RDCTOT
30kW
1.8V
The output of the expander will bias up to:
ǒ Ǔ VOUT DC +
1
)
R3
R4
VREF
ǒ Ǔ VOUT DC +
1
)
20kW
30kW
1.8V + 3.0V
The output will bias to 3.0 V when the internal resistors are
used. External resistors may be placed in series with R3,
(which will affect the gain), or in parallel with R4 to raise the
DC bias to any desired value.
R2
DG
R1
RDC *
CIN* R3
VIN
R4
−
VREF +
CRECT *
RDC *
CDC *
CF*
VOUT
ǒ Ǔ NOTE: GAIN +
1
R1 R2 IB 2
2R3 VINavg
IB = 140mA
*EXTERNAL COMPONENTS
Figure 7. Basic Compressor
Circuit Details − Rectifier
Figure 8 shows the concept behind the full−wave
averaging rectifier. The input current to the summing node
of the op amp, VIN/R1, is supplied by the output of the op
amp. If we can mirror the op amp output current into a
unipolar current, we will have an ideal rectifier. The output
current is averaged by R5, CR, which set the averaging time
constant, and then mirrored with a gain of 2 to become IG,
the gain control current.
I = VIN / R1 V+
R1
−
VIN
+
CR
R5
10kW
IG
Figure 8. Rectifier Concept
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