HPM10_16 Datasheet, PDF (6/18 Pages) ON Semiconductor – Power Management IC for Hearing Aids

HPM10
HPM10 Internal Architecture
The architecture of the HPM10 chip is shown in Figure 1.
HPM10
To Charger VDDP
Charger
CCIF
Communication
Interface
Battery Monitor
VBAT
to DSP
to DSP
SWIN
SWOUT
WARN
From DSP DS_EN
VDD_OTP
Timers
Oscillators
OTP
System
Controller
To Programmer
SCL
SDA
I2C Interface
DVREG
CREG
ADC (T, I, V)
Temperature
Sensor
Voltage and
Current Source
Charge Control
CLKDIV(2:0)
From DSP or
hardwired
EXT_CLK From DSP
Wakeup/Batt
Detect .
ATST_EN From programmer
VDDIO
Status and
Configuration
Registers
AGZN
Regulator
Step Down
Charge Pump
(DIV3)
VBAT
VSS
VSSA
Battery
AGZN_REG_EN
Voltage
switch
controller
CHA
VHA
CVBAT
To DSP
CP2
CP1
Figure 1. HPM10 Architecture
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