BUH50G Datasheet, PDF (6/8 Pages) ON Semiconductor – SWITCHMODE NPN Silicon Planar Power Transistor

BUH50G
There are two limitations on the power handling ability of
a transistor: average junction temperature and second
breakdown. Safe operating area curves indicate I_C−V_CE
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate. The data of Figure 20 is
based on T_C = 25°C; T_J(pk) is variable depending on power
level. Second breakdown pulse limits are valid for duty
cycles to 10% but must be derated when T_C > 25°C. Second
breakdown limitations do not derate the same as thermal
limitations. Allowable current at the voltages shown on
Figure 20 may be found at any case temperature by using the
appropriate curve on Figure 17.
T_J(pk) may be calculated from the data in Figure 22. At any
case temperatures, thermal limitations will reduce the power
that can be handled to values less than the limitations
imposed by second breakdown. For inductive loads, high
voltage and current must be sustained simultaneously during
turn−off with the base to emitter junction reverse biased. The
safe level is specified as a reverse biased safe operating area
(Figure 21). This rating is verified under clamped conditions
so that the device is never subjected to an avalanche mode.
TYPICAL CHARACTERISTICS
V_CE
dyn 1 ms
0V
dyn 3 ms
90% I_B
1 ms
3 ms
I_B
TIME
Figure 18. Dynamic Saturation Voltage
10
9
I_C
8
7
6
5 ^Vclamp
4
3 I_B
2
1
0
01
t_si
10% V_clamp
90% I_B1
90% I_C
t_fi
10% I_C
t_c
2
3
4
5
6
7
8
TIME
Figure 19. Inductive Switching Measurements
10
1 ms
10 ms
1 ms
5 ms
1
EXTENDED
SOA
DC
0.1
0.01
10
100
1000
V_CE, COLLECTOR-EMITTER VOLTAGE (VOLTS)
Figure 20. Forward Bias Safe Operating Area
5
GAIN ≥ 3
T_C ≤ 125°C
L_C = 500 mH
4
3
2
1
-5 V
0V
-1.5 V
0
300
600
900
V_CE, COLLECTOR-EMITTER VOLTAGE (VOLTS)
Figure 21. Reverse Bias Safe Operating Area
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