CM2009-05CP Datasheet, PDF (5/8 Pages) ON Semiconductor – VGA or DVI-I Port Companion Circuit

CM2009-05CP
ELECTRICAL OPERATING CHARACTERISTICS ^{(SEE NOTE 1)}
SYMBOL PARAMETER
I_CC
V_CC Supply Current
CONDITIONS
V_CC = 5V; SYNC inputs at GND or V_CC;
SYNC outputs unloaded, DDC_In and DDC_OUT
floating
V_CC = 5V; SYNC inputs at 3.0V;
SYNC outputs unloaded, DDC_In and DDC_OUT
floating
V_F
V_IH
V_IL
V_HYS
V_OH
V_OL
R_OUT
I_IN
I_OFF
I_BACKDRIVE
V_ON
C_{IN_VID}
t_PLH
t_PHL
t_R, t_F
V_ESD
ESD Diode Forward Voltage
I_F = 10mA
Logic High Input Voltage
V_CC = 5.0V; Note 2
Logic Low Input Voltage
V_CC = 5.0V; Note 2
Hysteresis Voltage
V_CC = 5.0V; Note 2
Logic High Output Voltage
I_OH = 0mA, V_CC = 5.0V; Note 2
Logic Low Output Voltage
I_OL = 0mA, V_CC = 5.0V; Note 2
SYNC Driver Output Resistance
V_CC = 5.0V; SYNC Inputs at GND or 3.0V
Input Current
VIDEO Inputs
SYNC_IN1, SYNC_IN2 Inputs
V_CC = 5.0V; V_IN = V_CC or GND
V_CC = 5.0V; V_IN = V_CC or GND
Level Shifting N-MOSFET "OFF" State
Leakage Current
(LV_EN - V ) _{DDC_IN} 0.4V; V_{DDC_OUT} = LV_EN
(LV_EN - V ) _{DDC_OUT} 0.4V; V_{DDC_IN} = LV_EN
Current conducted from input pins when Vcc
V < V _CC
INPUT_PIN
is powered down.
Voltage Drop Across Level-shifting
N-MOSFET when "ON"
LV_EN = 2.5V; V_S = GND; I_DS = 3mA
VIDEO Input Capacitance
V_CC = 5.0V; V_IN = 2.5V; f = 1MHz
V_CC = 2.5V; V_IN = 1.25V; f = 1MHz
SYNC Driver L => H Propagation Delay
C_L = 50pF; V_CC = 5.0V; Input t_R and t_F 5ns
SYNC Driver H => L Propagation Delay
C_L = 50pF; V_CC = 5.0V; Input t_R and t_F 5ns
SYNC Driver Output Rise & Fall Times
V_CC = 5V
ESD Withstand Voltage
V_CC = 5V; Note 3
MIN TYP MAX UNITS
1.0 mA
2.0 mA
1.1 V
2.0
V
0.55 V
450
mV
4.0
V
0.15 V
65
Ω
±10 μA
±10 μA
10 μA
10 μA
10
μA
0.18 V
3
pF
3.5 pF
12 ns
12 ns
7
ns
±8
kV
Note 1: All parameters specified over standard operating conditions unless otherwise noted.
Note 2: These parameters apply only to the SYNC drivers. Note that R_OUT = R_T + R_BUFFER.
Note 3: Per the IEC-61000-4-2 International ESD Standard, Level 4 contact discharge method. V_CC must be bypassed to GND
via a low impedance ground plane with a 0.22μF, low inductance, chip ceramic capacitor at each supply pin. ESD pulse
is applied between the applicable pins and GND. ESD pulses can be positive or negative with respect to GND.
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